ISE
ISim Properties
The ISim Properties apply to the Simulate Behavioral Model, Simulate Post-Place & Route Model, and Simulate Post-Fit Model processes, which determine how your design is simulated, and to the Check Syntax process, which determines how your design syntax will be verified for simulation.
Note The available properties vary depending on the process you have selected.
  •  Use Custom Simulation Command File
    Specifies whether or not to use a custom simulation command file for simulation. The custom simulation command file contains Tcl commands for the simulator. The commands in this file are performed when ISim starts. If you select this property, you must specify a filename in the Custom Simulation Command File field.
    For information about how the custom simulation command file is specified in the ISim executable file, see ISim Simulation Executable Overview and Syntax in the ISim Help, which describes the -tclbatch option. In the Help Viewer, click the Synchronize TOC button Image to view all related Help topics.
    By default, this property is set to False (checkbox is clear).
  •  Custom Simulation Command File
    If you selected the Use Custom Simulation Command File option, use this property to enter or browse to the custom simulation command file that you want to execute in simulation. This file should contain a series of Tcl commands for the simulator.
  •  Incremental Compilation (Advanced)
    When set to True (checkbox is selected), ISim compiles only the files that have changed since the last compile. Setting this to True (checkbox is selected) helps to speed up the compilation time.
  •  Compile for HDL Debugging (Advanced)
    Specifies whether or not to generate output that has debugging information. When set to True (checkbox is selected), debug information is compiled during simulation. When set to False (checkbox is clear), output has no debug information and simulation runs faster.
    By default, this property is set to True (checkbox is selected).
  •  Use Custom Project File (Advanced)
    Specifies whether or not to use a user-specified ISim PRJ file instead of the ISim PRJ generated by Project Navigator for compiling the design. If you select this property, you must specify a filename in the Custom Project Filename field.
    Note This property is not available for the Generate Self-Checking Test Bench process or the Simulate Post-Place & Route Model process.
  •  Custom Project Filename (Advanced)
    Specifies a custom ISim PRJ file that ISim uses to compile the design. The user-defined ISim PRJ file that you define in this property is passed to the ISim fuse executable. The ISim PRJ file contains HDL files and their target libraries. Following is an example PRJ file:
    VHDL vhdl_lib alu.vhd
    VHDL vhdl_lib cpu.vhd
    Verilog work tb.v
    NOSORT
    In this example, the PRJ file instructs ISim to compile alu.vhd and cpu.vhd into the vhdl_lib library and compile tb.v into the work library. The keyword NOSORT instructs ISim to compile the VHDL files in the order specified in the PRJ file instead of performing an automatic dependency sorting of the specified VHDL files. Verilog files are always compiled in specified order.
    Note For more information, see ISim Help. In the Help Viewer, click the Synchronize TOC button Image to view all related Help topics.
  •  Run for Specified Time
    Specifies whether or not to run simulation for a specified run time. Enter the simulation time in the Simulation Run Time property. Setting this property to False (checkbox is clear) allows you to run simulation and break at pre-circuit initialization or post-elaboration state. This is useful for debugging initialization issues with an HDL design.
    By default, this property is set to True (checkbox is selected).
    Note This property is available for Simulate Behavioral Model and Simulate Post-Place & Route Model processes only.
  •  Simulation Run Time
    Specifies the amount of time to run the simulation. Following are valid entries:
    •  <length> <unit> - Runs the simulation for <length><unit> of time.  <length> is a positive integer. <unit> is ps, ns, us, ms, or sec. For example, 2000 ns or 100 us.
    •  all - Runs the whole stimulus.
    •  continue - Runs the whole stimulus.
    •  No entry - Runs the simulation for 1000 ns.
    By default, this property is set to 1000 ns.
    Note This property is available for Simulate Behavioral Model and Simulate Post-Place & Route Model processes only.
  •  Waveform Database Filename
    Specifies the name of the simulation waveform database, which allows you to save the simulation waveform data for the current simulation run. You can also specify your own database file.
    By default, the name of the file is top_module_name_isim_flow_type.wdb. Where the top_module_name is the name of the top-level test bench file, and flow_type is the name of the simulation flow type, for example, Behavioral (beh) Post-Place & route (par), or Post-Fit (fit).
    Note This property is available for Simulate Behavioral Model, Simulate Post-Place & Route Model, and Simulate Post-Fit Model processes only.
  •  Use Custom Waveform Configuration File (Advanced)
    Specifies whether or not to use a custom waveform configuration file for simulation. When set to True (checkbox is selected), ISim automatically loads the wave configuration from the wave configuration file specified in the Custom Waveform Configuration File property.
    Note This property is available for Simulate Behavioral Model, Simulate Post-Place & Route Model, and Simulate Post-Fit Model processes only.
  •  Custom Waveform Configuration File (Advanced)
    Note This property is only available if the Use Custom Waveform Configuration File property is set to True (checkbox is checked).
    Specifies the name of the Waveform Configuration File, which contains a wave configuration saved from a previous simulation session. For information about the Wave Configuration File, see Wave Window Overview in the ISim Help. In the Help Viewer, click the Synchronize TOC button Image to view all related Help topics.
    Note This property is available for Simulate Behavioral Model, Simulate Post-Place & Route Model, and Simulate Post-Fit Model processes only.
  •  Generate SAIF File for Power Optimization/Estimation
    Instructs ISim to create a Synopsys Activity Interchange Format (SAIF) file that can be used for power estimation.
    By default, this is property is set to False (checkbox is clear).
    Note This property is available for Simulate Post-Place & Route Model process only.
  •  SAIF File Name
    Enter the SAIF file name that is generated.  The default file name is xpower_time_sim.saif.
    Note This property is available for the Simulate Post-Place & Route Model process only.
  •  Delay Values to be Read from SDF
    Specifies which delay values will be read from the SDF file and used for timing simulation.
    •  Setup Time
      Specifies that setup time delays will be read from the SDF file and used for the simulation. In the SDF file, these delays are listed as Maximum (MAX) delays.
      Setup time delays represent the worst case operative conditions of the target device. Under these conditions, the data paths of the device have the maximum delay possible, while the clock path delays are the minimum possible relative to the data path delays.
    •  Hold Time
      Specifies that hold time delays will be read from the SDF file and used for the simulation. In the SDF file, these delays are listed as Minimum (MIN) delays.
      Hold time delays represent the best case operative conditions of the target device. Under these conditions, the data paths of the device have the minimum delay possible, while the clock path delays are the maximum possible relative to the data path delays.
    Note This property is available for the Simulate Post-Place & Route Model process only.
  •  Other Compiler Options
    Enter additional command line options to the fuse command here. Fuse is the HDL compiler, elaborator, and linker used by ISim.
    Multiple options are separated with a space. The options entered in this property appear on the command line after all other property options specified in this property dialog box. Avoid setting duplicate options.
    You can specify one set of options in this dialog box as it applies to the Simulate Behavioral Model and Generate Self-Checking Test Bench processes, and another set of options as it applies to the Simulate Post-Place & Route Model process.
    For more information on fuse, see fuse Overview and Syntax and fuse options in the ISim Help. In the Help Viewer, click the Synchronize TOC button Image to view all related Help topics.
  •  Value Range Check (Advanced)
    Specifies whether or not to enable a runtime value range check. This option causes fuse, the HDL linker program used by ISim, to check that values assigned to VHDL signals are within their valid range. For example, if a signal is declared as positive, fuse will check that the signal is not assigned a negative number. If a signal is declared as stdlogic, fuse will check that it is assigned only valid stdlogic values (U,X,0,1,Z,W,L,H,-).
    By default, this property is set to False (checkbox is clear), and a run time range check does not occur.
  •  Specify Search Directories for ’Include (Advanced)
    Specifies one or more paths for Verilog ’include directives. To specify multiple search paths, type in the paths, separating each path with the pipe (|) symbol. The order of the paths in this property determines the search order.
  •  Specify ’define Macro Name and Value (Advanced)
    Specifies the macros used in Verilog files, and any value they require. Separate the macro name and value with an equal sign (=). Separate multiple entries with a pipe symbol (|) or comma (,) as follows:
    <macroname>=<value>|<macroname>=<value>
    <macroname>=<value>,<macroname>=<value>
    Note Spaces are not allowed in the macro name. However, spaces are allowed in the value.
  •  Specify Top Level Instance Names
    Allows you to specify one or more top modules for simulation, which are different from the top module for your project. This is useful when you have VHDL configuration statements in your design and you want to specify a configuration as your top module.
    By default, the top level instance name is set to the currently selected test bench.
    Note To specify multiple top modules, enter the module names separated by commas.
  •  ISim UUT Instance Name
    Specifies the instance name that was given to the instantiated design in the test bench. This name is used to annotate the SDF file.
    By default, the UUT instance name is set to the UUT module instance for the currently selected test bench.
    Note This property is not available for the Simulate Behavioral Model process.

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