Physical Constraints File (PCF)
A Physical Constraints File (PCF) is an optional input to XPower Analyzer.
It is a text file containing two separate sections:
- A section for physical constraints created by the MAP program.
- A section for physical constraints entered by the user into the User Constraints File (UCF),
and translated by the MAP program.
Loading a PCF file with the design file is recommended to
enable more accurate power estimation. XPower Analyzer reads the PCF file
and extracts frequency information from PERIOD constraints on clocks,
applying the values to the logic elements affected by the constraints.
This set of initial conditions can then be used by the vectorless estimation engine
to calculate activity rates for many nets within the design. Afterwards,
you can override these initial values by editing the desired clock
frequency or signal activity rate within XPower Analyzer.
Note PCF files
are applicable to FPGA designs only and cannot be used with CPLD designs.
A settings file (filename.xpa) is an XML—formatted file which records
two types of information:
- The current settings such as default toggle rates, voltages, and
- Optionally, if activity rates are defined in the interface or
were provided for the analysis via a constraints file or a simulation
file, XPower Analyzer will also store these activity rates.
A saved settings file can be reloaded with the design at any
Note By default, the settings file is called design_name.xpa.
Note A settings file can also be
generated from an Xilinx Power Estimator spreadsheet so you can easily import
your device environment setting into XPower Analyzer.
Note In earlier
releases of XPower Analyzer, the settings file had an .xml extension.
Simulation Activity File
(SAIF or VCD)
tools can generate SAIF or VCD files from behavioral or post-place and route timing
simulations. During simulation you can specify the nodes for which
switching activity will be recorded. Typically design I/O activity
and, if possible, internal node activity is recorded. Post-place and
route simulations usually take longer to run and provide more details
on the design activity and thus yield more accurate power estimation
than pre-implementation simulations. Xilinx® recommends including
a simulation activity file during power analysis if the simulation
represents typical or worst case design switching activity.
- VCD File
The value change section
of a VCD (Value Change Dump) file contains a series of time-ordered
value changes for the signals in a given simulation model.
Note Depending on the design size and simulation length, a VCD file may
become a large file and could require a long runtime to be read into XPower Analyzer.
In this case, you can shorten the load time by importing activity
rates in a SAIF file (see below).
Note Review your simulation
tool documentation for details on how to generate VCD files.
- SAIF File
The SAIF (Switching
Activity Interchange Format) standard was created to provide most
of the information contained in a VCD file but in a much smaller size
file. The smaller size reduces the time needed to read simulation
results into XPower Analyzer at a very minimal cost for the power estimation
Note Review your simulation tool documentation for details
on how to generate SAIF files.
Text Power Report (PWR)
Analysis results can
be saved in this text file for project documentation or parsing from
user scripts. A power report includes all of the information available
in the XPower Analyzer window. This include all Project Settings, Summary,
By Hierarchy, By Clock Domain, and Details views.
Note XPower Analyzer
generates a text file which can be viewed in a text editor and also
in a spreadsheet program such as Microsoft Excel. Opening the report in
a spreadsheet editor allows for grouping, filtering and other manipulations
to further document or analyze the power consumption of the design.
Note By default to improve readability the maximum number of lines
in each section of the power report is limited to 1000. You can adjust
the maximum number of lines per section in the dialog box that appears
when you select the Tools > Generate Advanced Report menu item.
Interoperability File (XPE)
analysis result report can be exported from XPower Analyzer and imported
into an Xilinx Power Estimator spreadsheet for further analysis. The file includes
all environment, settings, and design data.