Vivado Design Suite Tutorial: Power Analysis and Optimization (UG997) - 2021.1 English

Document ID: UG997
Release Date: 2021-06-30
Version: 2021.1 English

Revision History
Power Analysis and Optimization Tutorial
Software Requirements
Hardware Requirements
Hardware Requirements for 7 Series Devices
Hardware Requirements for UltraScale Devices
Locating Tutorial Design Files
7 Series Tutorial Design Files
UltraScale Device Tutorial Design Files
Running Power Analysis in the Vivado Tools
Introduction
Step 1: Creating a New Project
Step 2: Synthesizing the Design
Step 3: Setting Up the Report Power
Legends in Report Power Tool
Step 4: Running Report Power
Step 5: Viewing the Power Properties
Step 6: Editing Power Properties and Refining the Power Analysis
Step 7: Running Functional Simulation with SAIF Output
Step 8: Incorporating SAIF Data into Power Analysis
Step 9: Implementing the Design
Conclusion
Running Timing Simulation and Estimating Power
Introduction
Step 1: Configuring and Running the Timing Simulation using Vivado Simulator
Step 2: Running Report Power in Vectorless Mode
Step 3: Running Report Power with Vivado Simulator SAIF Data
Generating a SAIF File using Questa Advanced Simulator
Step 1: Configuring and Running Timing Simulation in Questa Advanced Simulator
Step 2: Running Report Power in Vectorless Mode
Step 3: Running Report Power with Questa Advanced Simulator SAIF Data
Conclusion
Measuring Hardware Power Using the KC705 Evaluation Board
Introduction
Step 1: Generating a Bit File from the Implemented Design (Non-Power Optimization)
Step 2: Setting Up the KC705 Evaluation Board
Step 3: Setting Up the Fusion Digital Power Designer Software
Step 4: Programming the Bitstream
Step 5: Measuring the Hardware Power Rails
Step 6: Estimating Vectorless Power with Junction Temperature
Conclusion
Measuring Hardware Power Using the KCU105 Evaluation Board
Introduction
Step 1: Generating a Bit File from the Implemented Design
Step 2: Setting up the KCU105 Evaluation Board
Step 3: Configuring the Maxim Digital Power Tool Software
Step 4: Programming the Bitstream
Step 5: Measuring the Hardware Power Rails
Step 6: Estimating the Vectorless Power with Junction Temperature
Conclusion
Performing Power Optimization
Introduction
Step 1: Setting Up Options to Run Power Optimization
Step 2: Running report_power_opt to Examine User/Design Specific Power Optimizations
Step 3: Running report_power to Examine Power Savings
Step 4: Turning Off Optimizations on Specific Signals and Rerunning the Implementation
Step 5: Running report_power_opt to Examine Tool Optimizations Again
Step 6: Saving Power using UltraScale Block RAM in Cascaded Mode
Conclusion
Additional Resources and Legal Notices
Xilinx Resources
Documentation Navigator and Design Hubs
References
Please Read: Important Legal Notices

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