#!/bin/sh

val=$1
if [ $val -eq 1 ]
then
	val2=$2
	#echo AQos enabled $val2
	value=$((0+0))
	if [ $val2 -eq 1 ]
	then
		#channel peak rate. A value of 0x1 sets a rate of one transaction every 256 cycles
		value=$((value|0x1000000))
	elif [ $val2 -eq 2 ]
	then
		#channel peak rate. A value of 0x2 sets a rate of one transaction every 128 cycles.
		value=$((value|0x2000000))
	elif [ $val2 -eq 3 ]
	then
		#channel peak rate. A value of 0x4 sets a rate of one transaction every 64 cycles
		value=$((value|0x4000000))
	elif [ $val2 -eq 4 ]
	then
		#channel peak rate. A value of 0x8 sets a rate of one transaction every 32 cycles
		value=$((value|0x8000000))
	elif [ $val2 -eq 5 ]
	then
		#channel peak rate. A value of 0x10 sets a rate of one transaction every 16 cycles
		value=$((value|0x10000000))
	elif [ $val2 -eq 6 ]
	then
		#channel peak rate. A value of 0x20 sets a rate of one transaction every 8 cycles
		value=$((value|0x20000000))
	elif [ $val2 -eq 7 ]
	then
		#channel peak rate. A value of 0x40 sets a rate of one transaction every 4 cycles
		value=$((value|0x40000000))
	elif [ $val2 -eq 8 ]
	then
		#channel peak rate. A value of 0x80 sets a rate of one transaction every 2 cycles
		value=$((value|0x80000000))
	fi
	#Enable QoS regulation for AW rate & outstanding write transactions
	devmem 0xF894610C 32 0x21
	# max no of aw_ot transactions
	devmem 0xF8946110 32 0xF00
	devmem 0xF8946118 32 $value
	#channel burstiness set to 1 for write transfers
	devmem 0xF894611C 32 0x1

	#echo write channel control using QoS for HP0 and HP2
	#devmem 0xF8008014 32 0xF0A
	#devmem 0xF800A014 32 0xF0A

	#echo read channel control using QoS for HP0 and HP2
	#devmem 0xF8008000 32 0xA
	#devmem 0xF800A000 32 0xA

	#SLCR reg for unlock
	devmem 0xf8000008 16 0xDF0D

	#set the DDR to select ARQoS & AWQoS
	devmem 0xf800061C 32 0xA0A2

	#SLCR reg for lock
	devmem 0xf8000004 16 0x767B

	#echo Configured for Dynamic QoS done
	#echo AQos enabled done
elif [ $val -eq 0 ]
then
	#echo AQos disabled
	devmem 0xF894610C 32 0x0
	devmem 0xF8946110 32 0x0
	devmem 0xF8946118 32 0x0
	devmem 0xF894611C 32 0x0

	#devmem 0xF8008014 32 0xF00
	#devmem 0xF800A014 32 0xF00

	#devmem 0xF8008000 32 0x0
	#devmem 0xF800A000 32 0x0
	
	#SLCR reg for unlock
	devmem 0xf8000008 16 0xDF0D

	#set the DDR to select ARQoS & AWQoS
	devmem 0xf800061C 32 0x0

	#SLCR reg for lock
	devmem 0xf8000004 16 0x767B

	#echo AQos disabled done
fi
