axi_mst_agent

AXI Master Agent.

It contains other components which comprise the entire Master Verification component.

These components are Monitor, Read Driver and Write Driver, vif_proxy -- refer PG267 section about AXI Master Agent for more details.

Information
class member

axi_monitor `AXI_PARAM_ORDER monitor;

axi_mst_wr_driver `AXI_PARAM_ORDER wr_driver;

axi_mst_rd_driver `AXI_PARAM_ORDER rd_driver;

axi_vif_mem_proxy `AXI_PARAM_ORDER vif_proxy;

axi_mst_agent includes a monitor, a read driver, a write driver and vif_proxy. Please refer below picture for more details about axi_mst_agent.

Functions
new

function new ( |
| string | name | = | "unnamed_axi_mst_agent",
virtual interface axi_vip_if ` | AXI_PARAM_ORDER | vif |  |
| );

Constructor to create an AXI Master Agent,~name~ is the instance name and axi_vip_if is the interface in the design. Please see PG267 for how to find the interface in design hierarchy.

set_verbosity

virtual function void set_verbosity( |
xil_verbosity | updated
| );

Sets the verbosity of the axi_mst_agent and all sub classes to determine whether the information will be printed out or not. refer xil_info for verbosity level setting.

set_agent_tag

virtual function void set_agent_tag( |
string | updated
| );

Sets the tag of the axi_mst_agent and all sub classes. If more than one VIPs(in master mode) being used in the same testbench, User can use set_agent_tag with different tag to tell where exactly the log message comes from.

set_vif

function void set_vif( |
axi_vif_mem_proxy ` | AXI_PARAM_ORDER | vif
| );

Sets the Agent's virtual interface. This is the interface that will be monitored and/or driven.

set_wr_transaction_depth

function void set_wr_transaction_depth( |
input | xil_axi_uint | update
| );

Sets the number of WRITE transactions that the Agent will have in flight at one time.

get_wr_transaction_depth
function xil_axi_uint get_wr_transaction_depth();

Returns the maximum number of WRITE transactions that the Agent will have in flight at one time.

set_rd_transaction_depth

function void set_rd_transaction_depth( |
input | xil_axi_uint | update
| );

Sets the number of READ transactions that the Agent will have in flight at one time.

get_rd_transaction_depth
function xil_axi_uint get_rd_transaction_depth();

Returns the maximum number of READ transactions that the Agent will have in flight at one time.

enable_transaction_depth_checks
function void enable_transaction_depth_checks();

Turn on current agent's transaction depth checks and its monitor's enable_transaction_depth_checks

disable_transaction_depth_checks
function void disable_transaction_depth_checks();

Turn off current agent's transaction depth check and its monitor's enable_transaction_depth_checks

start_monitor
virtual task start_monitor();

Enables the monitor in this agent to start collecting data.

start_master
virtual task start_master();

Enables the monitor, READ driver and WRITE Driver in this agent to start collecting data. The drivers will only issue transactions when the send functions are called.

stop_master
virtual task stop_master();

Disables the READ and WRITE drivers. Once disabled, no further action will occur by the drivers.

halt_master
virtual task halt_master();

Allows for all inflight transactions to complete and no new transaction will be serviced. All other transactions will halt.

resume_master
virtual task resume_master();

Resumes processing of the pending transactions.

stop_monitor
virtual task stop_monitor();

Disables the monitor in this agent from start collecting data. . Once disabled, no further action will occur by the monitor.

wait_drivers_idle
task wait_drivers_idle();

This blocking function will not return until all the downstream transactions have completed.

send_multi_wrbursts

virtual task send_multi_wrbursts( |
input | xil_axi_uint | num_xfers,
input | xil_axi_ulong | start_addr,
input | xil_axi_uint | myid,
input | xil_axi_size_t | mysize,
input | xil_axi_len_t | mylen,
input | xil_axi_burst_t | myburst,
input | bit | no_xfer_delays
| );

Convenience function to generate a series of same type of transactions.

    input xil_axi_uint    num_xfers,
    input xil_axi_ulong   start_addr = 'h0,
    input xil_axi_uint    myid = 0,
    input xil_axi_size_t  mysize = convert_dw_to_axi_size(C_AXI_WDATA_WIDTH),
    input xil_axi_len_t   mylen = 15,
    input xil_axi_burst_t myburst = XIL_AXI_BURST_TYPE_INCR,
    input bit             no_xfer_delays = 0

send_multi_rand_wrbursts

virtual task send_multi_rand_wrbursts( |
input | xil_axi_uint | num_xfers, |  |
input | bit | no_xfer_delays | = | 0
| );

Convenience function to generate a series of random transactions.

send_multi_rdbursts

virtual task send_multi_rdbursts( |
input | xil_axi_uint | num_xfers,
input | xil_axi_ulong | start_addr,
input | xil_axi_uint | myid,
input | xil_axi_size_t | mysize,
input | xil_axi_len_t | mylen,
input | xil_axi_burst_t | myburst,
input | bit | no_xfer_delays
| );

Convenience function to generate a series of same type of transactions transactions.

    input xil_axi_uint    num_xfers,
    input xil_axi_ulong   start_addr = 'h0,
    input xil_axi_uint    myid = 0,
    input xil_axi_size_t  mysize = convert_dw_to_axi_size(C_AXI_RDATA_WIDTH),
    input xil_axi_len_t   mylen = 15,
    input xil_axi_burst_t myburst = XIL_AXI_BURST_TYPE_INCR,
    input bit             no_xfer_delays = 0

send_multi_rand_rdbursts

virtual task send_multi_rand_rdbursts( |
input | xil_axi_uint | num_xfers, |  |
input | bit | no_xfer_delays | = | 0
| );

Convenience function to generate a series of random transactions.

AXI4_READ_BURST

virtual task AXI4_READ_BURST ( |
input | xil_axi_uint | id,
input | xil_axi_ulong | addr,
input | xil_axi_len_t | len,
input | xil_axi_size_t | size,
input | xil_axi_burst_t | burst,
input | xil_axi_lock_t | lock,
input | xil_axi_cache_t | cache,
input | xil_axi_prot_t | prot,
input | xil_axi_region_t | region,
input | xil_axi_qos_t | qos,
input | xil_axi_user_beat | aruser,
output bit [ | 8*4096-1:0] | data,
output xil_axi_resp_t [ | 255:0] | resp,
output xil_axi_data_beat [ | 255:0] | ruser
| );

This task does a full read process for AXI4.It is composed of a series of tasks and functions. It first creates transaction from master read driver,sets up the transaction, sends it and then waits till response back. This task returns when the read transaction is complete.

AXI3_READ_BURST

virtual task AXI3_READ_BURST ( |
input | xil_axi_uint | id,
input | xil_axi_ulong | addr,
input | xil_axi_len_t | len,
input | xil_axi_size_t | size,
input | xil_axi_burst_t | burst,
input | xil_axi_lock_t | lock,
input | xil_axi_cache_t | cache,
input | xil_axi_prot_t | prot,
output bit [ | 8*2048-1:0] | data,
output xil_axi_resp_t [ | 15:0] | resp
| );

This task does a full read process for AXI3. It is composed of a series of tasks and functions. It first creates transaction from master read driver,sets up the transaction, sends it and then waits till response back. This task returns when the read transaction is complete.

AXI4LITE_READ_BURST

virtual task AXI4LITE_READ_BURST ( |
input | xil_axi_ulong | addr,
input | xil_axi_prot_t | prot,
output bit [ | 8*8-1:0] | data,
output | xil_axi_resp_t | resp
| );

This task does a full read process for AXI4LITE. It is composed of the task AXI_READ_BURST_BLOCKING with only addr, prot,data and resp. all other inputs are set to be either 0 or AXI4LITE Value This task returns when the read transaction is complete.

AXI4_WRITE_BURST

virtual task AXI4_WRITE_BURST ( |
input | xil_axi_uint | id,
input | xil_axi_ulong | addr,
input | xil_axi_len_t | len,
input | xil_axi_size_t | size,
input | xil_axi_burst_t | burst,
input | xil_axi_lock_t | lock,
input | xil_axi_cache_t | cache,
input | xil_axi_prot_t | prot,
input | xil_axi_region_t | region,
input | xil_axi_qos_t | qos,
input | xil_axi_user_beat | awuser,
input bit [ | 8*4096-1:0] | data,
input xil_axi_data_beat [ | 255:0] | wuser,
output | xil_axi_resp_t | resp
| );

This task does a full write process for AXI4. It is composed of AXI4_WRITE_BURST_BLOCKING with inputs suits for AXI4.This task returns when the complete write transaction is complete.

AXI3_WRITE_BURST

virtual task AXI3_WRITE_BURST ( |
input | xil_axi_uint | id,
input | xil_axi_ulong | addr,
input | xil_axi_len_t | len,
input | xil_axi_size_t | size,
input | xil_axi_burst_t | burst,
input | xil_axi_lock_t | lock,
input | xil_axi_cache_t | cache,
input | xil_axi_prot_t | prot,
input bit [ | 8*2048-1:0] | data,
output | xil_axi_resp_t | resp
| );

This task does a full write process for AXI3. It is composed of AXI4_WRITE_BURST_BLOCKING with inputs suits for AXI3.This task returns when the complete write transaction is complete.

AXI4LITE_WRITE_BURST

virtual task AXI4LITE_WRITE_BURST ( |
input | xil_axi_ulong | addr,
input | xil_axi_prot_t | prot,
input bit [ | 8*8-1:0] | data,
output | xil_axi_resp_t | resp
| );

This task does a full write process for AXI4LITE. It is composed of AXI4_WRITE_BURST_BLOCKING with inputs suits for AXI4LITE.This task returns when the complete write transaction is complete.

set_nobackpressure_readies
virtual task set_nobackpressure_readies();

Convenience function to set the RREADY/BREADY of the master to not apply any backpressure to the simulation.