ISE® Design Suite is the Industry-proven solution for Xilinx All Programmable devices including 7 series (and pre-7 series devices) and Zynq™-7000 All Programmable SoC. It is available in three editions:
The capabilities, limitations, and system requirements for the above editions can be found here.
Students can download the WebPack Edition free of charge from here and generate a license, free of charge, for use at home on their own machine. Professors and researchers can also download the WebPack Edition to get acquainted with the suite. For teaching and research purpose, Embedded Edition or System Edition is often needed by professors and researchers. Xilinx University Program offers the full System Edition for purchase or donation. The Embedded Edition is NOT currently offered in the XUP donation program however it can be purchased at an academic discount price.
XUP has developed number of workshops using ISE Design suite. These workshops are typically two days long. All workshop materials are in English and consist of presentation slides and lab documents. Professors source documents and can freely use the presentation material in their classroom for teaching purpose. They can modify, exclude slides they find irrelevant to their course objectives, and add supplementary material. Thus they can extend the usability to a semester or quarter long period.
The lab source files are available for the students to carry out the labs. Lab solutions are only available to the professors.
|FPGA Design Flow||Introductory||Atlys, Nexys3, XUPV5, Genesys, S3E Kit||13.x, 12.x|
|DSP Design Flow||Introductory||Atlys, XUPV5, S3E Kit||14.x, 13.x, 12.x|
|Embedded System Design Flow on Zynq||Introductory||ZedBoard||14.2|
|Embedded System Design Flow on MicroBlaze||Introductory||Atlys, Nexys3, XUPV5, Genesys, S3E Kit||14.2, 13.x, 12.x|
|High-Level Synthesis Flow on Zynq||Introductory||ZedBoard||14.2|
|High-Level Synthesis Flow on MicroBlaze||Introductory||Atlys||14.x, 13.x|
|Advanced Embedded System Design on Zynq||Intermediate||ZedBoard||14.4|
|DSP Primer||Intermediate||ZedBoard, Atlys||14.4|
|Embedded Linux on MicroBlaze||Intermediate||Atlys||14.2|
|Partial Reconfiguration Flow||Intermediate||ML605, XUPV5, Genesys||14.2, 13.x, 12.x|