Workshops
Xilinx University Program (XUP) workshops comprises of presentations combined with hands-on lab exercises. The workshops material are available in areas of FPGA design flow, embedded system design, digital signal processing, high-level synthesis, partial reconfiguration, and embedded linux. All workshop materials are in English.
Xilinx has two sets of design tools- Vivado Design suite and ISE Design suite.
Vivado-Based Workshops
The Vivado Design suite supports 7-Series, Zynq, and UltraScale programmable families. They are developed to address the productivity bottlenecks in system-level integration and implementation. The Vivado Design suite is a Generation Ahead in overall productivity, ease-of-use, and system level integration capabilities.
| Tile | Level | Boards | Versions |
| FPGA Design Flow using Vivado | Introductory | ZedBoard, ZYBO, Nexys4/DDR, NexysVideo, Basys3 | 2016x, 2015x, 2014x |
| Embedded System Design Flow on Zynq | Introductory | ZedBoard, ZYBO | 2015x, 2014x, 2013x |
| High-Level Synthesis Flow on Zynq | Introductory | ZedBoard, ZYBO | 2017x, 2016x, 2015x |
| System Design on Zynq using SDSoC | Introductory | ZedBoard, ZYBO | 2017x, 2016x, 2015x |
| Advanced Embedded System Design on Zynq | Intermediate | ZedBoard, ZYBO, PYNQ-Z1, PYNQ-Z2 | 2018x, 2017x, 2016x |
| Embedded Linux on Zynq (Archived) | Intermediate | ZedBoard, ZYBO | 2015x, 2014x, 2013x |
| System Design Flow on Zynq (Archived) | Intermediate | ZedBoard, ZYBO | 2015x, 2014x, 2013x |
| Partial Reconfiguration Flow on Zynq | Intermediate | ZedBoard, ZYBO | 2016x, 2015x, 2014x |
ISE-Based Workshops (Archived)
The ISE Design suite is the industry-proven solution for programmable devices including 7-Series, pre-7 series devices (Virtex-6, Spartan-6, Virtex-5, Virtex-4, Spartan-3x, Virtex-2P), and Zynq SoC.
| Title | Level | Boards | Versions |
| FPGA Design Flow | Introductory | Atlys, Nexys3, XUPV5, Genesys, S3E Kit | 13.x, 12.x |
| DSP Design Flow | Introductory | Atlys, XUPV5, S3E Kit | 14.x, 13.x, 12.x |
| Embedded System Design Flow on Zynq | Introductory | ZedBoard | 14.2 |
| Embedded System Design Flow on MicroBlaze | Introductory | Atlys, Nexys3, XUPV5, Genesys, S3E Kit | 14.2, 13.x, 12.x |
| High-Level Synthesis Flow on Zynq | Introductory | ZedBoard | 14.2 |
| High-Level Synthesis Flow on MicroBlaze | Introductory | Atlys | 14.x, 13.x |
| Advanced Embedded System Design on Zynq | Intermediate | ZedBoard | 14.4 |
| DSP Primer | Intermediate | ZedBoard, Atlys | 14.4 |
| Embedded Linux on MicroBlaze | Intermediate | Atlys | 14.2 |
| Partial Reconfiguration Flow | Intermediate | ML605, XUPV5, Genesys | 14.2, 13.x, 12.x |