Attending FPT? Come join us on 11th December to learn more about AMD AI Engine programming models and latest updates on the Vitis tool.
Register here (an AMD account is required)
The Versal adaptive SoC is the latest generation technology in the Xilinx (now part of AMD) product line. Versal devices feature: AI Engine (AIE), Programmable Logic (Adaptable Engine), and Processing System (Scalar Engine). These three Engines, tightly-coupled with a network-on-chip (NoC), constitute a truly heterogeneous system in a single chip.
The AIE, a new type of compute element, is a tiled array of very long instruction word (VLIW) and Single Instruction Multiple Data (SIMD) processing elements that provides high compute density, helping overcome the decline of Moore’s law. At CES 2023, Lisa Su (AMD CEO) announced the integration of AIE on Ryzen 7040 AMD processors. More information about AIE here.
This tutorial will primarily focus on the Adaptable Intelligent Engine; however, we will briefly describe the adaptive SoC architecture. This tutorial lays the foundations for understanding the capabilities of the Adaptable Intelligent Engine, its programming model, data movement and computation model (data flow architecture). Also, A project-based learning lab will be provided to attendees for the hands-on experience of using AI Engine to accelerate the DSP algorithm. In the meantime, the latest Ryzen AI design flow, new Vitis IDE and HLS code analyzer features in 2023.2 release will be demonstrated during this tutorial.
Some basic FPGA awareness would be an advantage, but is not required, although participants should have some knowledge of parallel processing concepts and/or parallel hardware. Familiarity with the C++ programming language would be an advantage.
AMD will provide remote access to Heterogeneous Accelerated Compute Clusters (HACC) which will be enabled with tools and devices. Please apply for a user account to access HACC NUS through this link at least one week prior to the FPT 2023 event.
Attendees must have their own laptop with reasonable screen size to effectively use the required software (Tablet, and Netbook type devices are not suitable).
The times in this agenda are tentative.
|13:30 – 14:00||HACC Registration and Environment Setup|
|14:00 – 14:50||Introduction to the Versal AI Engine Architecture|
|Versal AI Engine Memory and Data Movement|
|14:50 – 15:40|
|Low-Pass FIR Project Based Learning Lab|
|15:40 – 16:00||Coffee Break|
|16:00 – 16:40||Ryzen AI Software Platform Design Flow Introduction|
|Vitis 2023.2 New Feature Update|
|16:40 – 17:00||AMD University Program Introduction|