Getting Started with the Versal ACAP Platform

This course introduces the Versal® ACAP architecture and design methodology. This is a one-day version of the Designing with the Versal ACAP: Architecture and Methodology On-Demand course available for purchase.

The lab instructions and lab files for this course are available for download here.

1 Architecture and Overview
Provides a high-level overview of the Versal architecture, illustrating the various engines available in the Versal architecture.
2 Design Tool Flow
Maps the various engines in the Versal architecture to the tools required and describes how to target them for final image assembly.
3 Processing System
Reviews the Cortex™-A72 processor APU and Cortex-R5 processor RPU that form the Scalar Engine. The platform management controller (PMC), processing system manager (PSM), I/O peripherals, and PS-PL interfaces are also covered.

NoC Introduction and Concepts
Covers the reasons to use the network on chip, its basic elements, and common terminology.

Perform the "NoC Introduction and Concepts" lab after completing this module.

5 AI Engine
Discusses the AI Engine array architecture, terminology, and AIE interfaces.
6 SelectIO Resources
Describes the I/O bank, SelectIO™ interface, and I/O delay features.

System Simulation
Explains how to perform system-level simulation in a Versal ACAP design.

Perform the "System Simulation" lab after completing this module.

8 Application Partitioning
Covers what application partitioning is and how the mapping of resources based on the models of computation can be performed.