Aurora
Related Information
- View the webcast: Building Robust 6.5Gbps Serial Links with Virtex-5 FPGAs.
- Register for Designing with Multi-Gigabit Serial I/O class
Aurora is a scalable, lightweight, link-layer protocol that is used to move data across point-to-point serial links. It is an open protocol and is free of charge. It provides a transparent interface to the physical serial links, allowing upper layers of proprietary or industry-standard protocols to easily use these high-speed serial links.
Why use the Aurora?
Aurora is a very efficient low-latency protocol that uses the least possible amount of logic while offering a rich, highly configurable feature set. Aurora increases bandwidth through bonded lanes. Aurora also requires little time to integrate in to existing user designs.
Benefits of Aurora
- High bandwidth transmission limited only by SERDES data rate capability
- Supports a large number of bonded lanes for high aggregate bandwidth
- Supports Full Duplex & Simplex channels
- Unlimited Frame size/flexible framing
- Small logic footprint
- Built-in Flow control
| Xilinx Solutions for Aurora: By IP | ||
|---|---|---|
| Aurora IP | FPGA Device | Technical Documents |
| Aurora 8B/10B | Virtex®-6 LXT, SXT / Virtex-5 TXT, FXT, SXT, LXT | Documentation |
| Aurora 8B/10B Virtex-4 FX | Virtex-4 FX | Documentation |
| Aurora 64B/66B | Virtex-5 TXT, FXT - No new family support | Documentation |
Choose the Correct Solution for Your Application
Aurora can be used in any application that requires serial point to point connectivity. Aurora can be applied where an inexpensive, high-performance link layer with little resource consumption is required, saving many hours of work for users who were considering developing their own MGT protocols. Some of the popular applications are listed here.
- Chip to Chip Applications
- Example - line card, switch card
- Board to Board applications
- Example - short reach optics, cables
- Extend legacy Backplane usage to new performance requirements
- Streaming data interface
Application Specific Integrated Circuits (ASIC) Applications & Aurora Bus Functional Model (ABFM):
Aurora can also be supported in Application Specific Integrated Circuits (ASIC) through a license of the Xilinx Aurora core. To support ASIC applications, Xilinx provides a Bus Functional Model (BFM).
The ABFM models the behavior of the Aurora protocol and can be used as a reference model to check the compliance of the design with the Aurora Protocol. The ABFM can also generate stimulus for and to monitor the response of an Aurora interface design, which is referred to as the device under test (DUT). The Aurora BFMs are available for both the Aurora 8B10B Protocol and the Aurora 64B66B Protocol. The ABFM provides parameterization of the protocol parameters (number of lanes, interface width, etc..) and that can be used to test any implementation of the Aurora protocol.
The ABFMs provides flexibility, a clean room implementation of Aurora to verify the DUT or an ASSP/ASIC compliance with Aurora protocol. The ABFM can be easily integrated into an existing verification environment specifically designed to test the DUT. Once the ABFM is integrated into the verification environment, it can communicate with the DUT using a programming language interface (PLI) for Verilog environments or a foreign language interface (FLI) for VHDL + Modelsim environment or a VHPI interface for VHDL + NCSIM environment. The PLI, FLI and VHPI contain transaction based calls that are used to establish communication between the DUT and ABFM.
For ASIC licensing and pricing information or for BFM availability information regarding Aurora, contact your local sales person or Xilinx Aurora Marketing.