When I run PAR on certain designs that contain a ChipScope ILA Core, one net cannot be routed, which causes a BitGen error similar to the following:
"ERROR:DesignRules:10 - Netcheck: The signal "U_ila_pro_/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/u_mu/i_mut_gand/u_match/cfg _data_63" is completely unrouted.
WARNING:Bitgen:25 - DRC detected 1 errors and 0 warnings. Error: bitgen failed"
This is a known issue, and it will be fixed in a future release of the software. In the meantime, you can work around this issue using one of the following:
- Change the match type from "Basic" to "Basic w/ edges".
- Change the trigger width to a number that, when divided by eight, does not leave a remainder of 1, 2, 3, or 4. For example if your Trigger Width is 20, change it to 21.
- Disable RPM's.