The support of recovery and removal analysis has been included in the 9.1i and newer Timing Analyzer software.
Removal Timing Check:
A removal timing check ensures that there is adequate time between an active clock edge and the release of an asynchronous control signal. The check ensures that the active clock edge has no effect because the asynchronous control signal remains active until removal time after the active clockedge. In other words, the asynchronous control signal is released (becomes inactive) well after the active clock edge so that the clock edge can have no effect.
Recovery Timing Check:
A recovery timing check ensures that there is a minimum amount of time between the asynchronous signal becoming inactive and the next active clock edge. In other words, this check ensures that after the asynchronous signal becomes inactive, there is adequate time to recover so that the next active clock edge can be effective. For example, consider the time between an asynchronous reset becoming inactive and the clock active edge of a flip-flop. If the active clock edge occurs too soon after the release of reset, the state of the flip-flop may be unknown.
Both of these checks are meaningful on the desertion edge of an asynchronous reset.
To enable the recovery and removal times in Timing Analyzer, the user has the option under the Path Tracing tab of Analyze Against User Defined Constraints dialog. The Path Tracing controls are available under ENABLE and DISABLE constraints in the Constraints Guide.
The reg_sr_q was the older path tracing control, which was converted to reg_sr_o (Propagation Delay) and reg_sr_r (Recovery and Removal).
The reg_sr_clk is for synchronous reset/set of the synchronous element, whereas the reg_sr_o and reg_sr_r are for asynchronous set/reset of the synchronous element.