When the rate of my CIC Compiler v1.3 filter is changed, by writing a new value to the DATA port, the output becomes unstable and continually overflows creating a triangle wave on the output.
Why does this occur?
This is due to the architecture of a programmable rate CIC filter which causes the CIC to become unstable when rates are changed. If there is any non-zero data in the pipeline when the rate change occurs, the output overflows continually.
To work around this issue, apply a new rate to the CIC Compiler v1.3 by performing the following:
This ensures that the data pipeline is clear when the rate change occurs, thus avoiding triggering the unstable CIC response.
For a detailed list of LogiCORE Cascaded Integrator Comb Compiler (CIC Compiler) Release Notes and Known Issues, see (Xilinx Answer 29297).