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AR# 41007

13.1 Project Navigator - When an XPS system is top, running "Implement Top Module" causes Translate Failure


Implementing a single EDK design from within ISE Project Navigator results in a Translate error.

WARNING:NgdBuild:257 - Launcher: Could not find the file "###\###\###\system_synthtop" with extension "ngc" in the search path.
ERROR:NgdBuild:1364 - Top-level input design file "system_synthtop.ngc" cannot be found or created. Please make sure the source file exists and is of a recognized netlist format (e.g., ngo, ngc, edif, edn, or edf)


To work around this issue, manually add a VHDL wrapper around the system.xmp and use this as your top level.

In ISE Design Suite 13.2, when an XPS source is selected as top the Export HW Design With bitstream process is not available, so the user is forced to add an HDL top in order to process successfully.

This can done by selecting "Generate Top HDL Source" within ISE software.

AR# 41007
Date Created 06/22/2011
Last Updated 12/15/2012
Status Active
Type General Article
  • ISE Design Suite - 13.1