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AR# 41309

MIG Spartan-6 MCB - Do I need to add a TIG to SELFREFRESH_MCB_REQ if I enable Self Refresh on the MCB?

Description

The Spartan-6 FPGA MIG design includes the top-level RTL ports 'selfrefresh_mode' and 'selfrefresh_enter.' 

By default, the MIG design drives the selfrefresh_mode signal and grounds the selfrefresh_enter signal in the top-level.

If the design uses Self Refresh, make sure that the ports are controlled by user logic as stated in the MCB Operation > Self Refresh chapter of UG388.

In addition, you must add a TIG to the SELFREFRESH_MCB_REQ registers in the mcb_soft_calibration module.

Solution

The MIG-generated RTL disables the MCB self refresh mode by default. 

You can activate the self refresh mode by asserting the port signal selfrefresh_enter for the memc_wrapper.

However, a hold time violation can occur when it is activated. 

The failing path starts at: "memc1_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/SELFREFRESH_MCB_REQ"

and ends at "memc1_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrapper_inst/samc_0." 

The hold timing violation occurs due to clock domain crossing.

To avoid the violation, add the following TIG constraint to the UCF:

NET "memc?_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/SELFREFRESH_MCB_REQ" TIG;

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
40737 MIG Spartan-6 MCB - Self-Refresh as defined by JEDEC Specification N/A N/A
AR# 41309
Date Created 08/15/2011
Last Updated 12/01/2014
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
IP
  • MIG