I am using IODELAY and IDELAYCTRL elements in my design and receive the following message:
Why is this happening?
This issue occurs because the IDELAYCTRL should be driven by a BUFG instead of a BUFR, as stated in the Select IO Users Guide for Virtex 6:
"REFCLK - Reference Clock
The reference clock (REFCLK) provides a time reference to IDELAYCTRL to calibrate all IODELAYE1 modules in the same region.
This clock must be driven by a global clockbuffer (BUFGCTRL).
REFCLK must be FIDELAYCTRL_REF the specified ppm tolerance (IDELAYCTRL_REF_PRECISION) to guarantee a specified IODELAYE1 resolution (TIDELAYRESOLUTION).
REFCLK can be supplied directly from a user-supplied source or the MMCM and must be routed on a global clock buffer."