Version Found: 1.8
Version Resolved: See (Xilinx Answer 45195)
The MIG 7 Series tool does not allow selecting 800 MHz for dual rank DIMMs in a -2 FPGA design when dual rank 1.35v/1.5V is chosen with 1.5V option.
This configuration is supported at 800 MHz (only when targeting the DIMM at 1.5V). Manual modifications can be made to the RTL to support 800 MHz. An 800 MHz non-dual rank design can be generated, and the clocking parameters (i.e., frequency and PLL M/D parameters) and CWL/CL parameters can be copied over to the dual rank RTL.
07/02/2013 - Initial release