We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 56878

SDK 14.6/2013.2 - SDK fails to program FPGA if the IPI design or XPS submodule is deep within the Vivado hierarchy


In Vivado system, where the IP Integrator block design or the XPS sub module is deep within the hierarchy, the SDK will fail during Program FPGA with an error message stating that the processor is not present in the Hardware System.

How can this be addressed?


To fix this issue, download the patch attached to this Answer Record, and follow the steps below. 

Steps to apply patch:


1.       Take backup of files com.xilinx.sdk.targetmanager.ui_1.0.0.jar and com.xilinx.sdk.tools_1.0.0
 at <SDK Installation Location>/SDK/2013.2/eclipse/<platform>/eclipse/plugins to different names.
2.       Unzip attached zip file (it has two jar files com.xilinx.sdk.targetmanager.ui_1.0.0.jar and com.xilinx.sdk.tools_1.0.0).
3.       Then copy the files in attachment to <SDK Installation Location>/SDK/2013.2/eclipse/<platform>/eclipse/plugins.


Associated Attachments

Name File Size File Type
AR56878.zip 180 KB ZIP
AR# 56878
Date Created 07/25/2013
Last Updated 07/26/2013
Status Active
Type General Article
  • EDK - 14.6
  • Vivado Design Suite - 2013.2