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AR# 58009

Vivado Synthesis - Warning: Skipped directive 'ram_style' : Block implementation is mandatory for this RAM

Description

Vivado Synthesis infers block RAM instead of distributed RAM even when ram_style="distributed" is specified. 

The message in Vivado Synthesis is as follows:

Warning: Skipped directive 'ram_style' : Block implementation is mandatory for this RAM


The code I am using to infer the ram is as follows:

   (* ram_style = "distributed" *) reg[3:0] myram[7:0];
   
    always @(posedge clk) 
    if(we1)
        myram[addr1] <= din1;
    else 
       dout1 <= myram[addr1];
   
    always @(posedge clk)
    if(we2)
        myram[addr2] <= din2;
    else 
        dout2 <= myram[addr2];

However, XST infers distributed RAM.

Solution

Vivado Synthesis is behaving correctly.

For certain types of RAM, typically true dual port RAM, it is not correct to implement it in Distributed RAM.

XST actually generates incorrect logic when inferring distributed RAM for these types of RAM which causes synthesis and simulation mismatch.
AR# 58009
Date Created 10/17/2013
Last Updated 12/18/2014
Status Active
Type General Article
Tools
  • ISE Design Suite