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AR# 61137

Zynq-7000 AP SoC, PS DDRC – What is ECC scrubbing?


The ZYNQ Technical Reference Manual states that the "reg_ddrc_dis_scrub" register can enable scrubs.

What is ECC scrubbing?


Zynq DDRC supports automatic data scrubbing of correctable errors.

If ECC scrubbing is enabled, the error data will be corrected in the DRAM.
When the controller detects a correctable ECC error, it does the following:
  • Sends the corrected data to the core as part of the read data.
  • Sends the ECC error information to the register interface for logging.
  • Performs a Read Modify Write (RMW) operation to correct the data present in the DRAM (only if ECC scrubbing is enabled (reg_ddrc_dis_scrub =  0).
    This RMW operation is invisible to the core.
    Only one scrub RMW command can be outstanding in the controller at any time.
    No scrub is performed on single-bit ECC errors that occur while the controller is processing another scrub RMW.
AR# 61137
Date Created 06/15/2014
Last Updated 11/05/2014
Status Active
Type General Article
  • Zynq-7000