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AR# 64238

SDK - 2015.1 - SREC bootloder is failing to boot image from AXI QSPI on Artix


I have a simple MicroBlaze system with an AXI QSPI device. 

I have exported to SDK, and created an SREC bootloader app.

However, the bootloader app fails.

How can I fix this?


There are known issue with the xilisf library in SDK for Artix devices. 

To address this, please download the attached zip file and follow the instructions below.

The zip file contains the following folder structure:

userrepo -> xilisf_v5_2


Step 1: Add the repository to SDK Local Repository

Go to Xilinx Tools -> Repositories. 

Under Local Repositories, select New, and point to the userrepo that is attached to this Answer Record.

Select Rescan Repositories, Apply, and OK to continue.

Note: The local repository needs to point to the directory that contains the xilisf_v5_2 folder.


Step 2: Create SPI bootloader application

To create the application, go to File -> New -> Application Project.

Name the bootloader, then select Next to continue.

Select SREC SPI Bootloader. 

Select Finish to continue.

In the newly created bootloader app, open the blconfig.h file and change the default offset to suit your needs.

For example, if you want to program the application at an offset of 0x0060000, then the value of FLASH_IMAGE_BASEADDR in this bootloader will be 0x00600000:

Step 3: Update the BSP to use the updated version of xilisf

Right click on the BSP and select Board Support Package Settings. 

Make sure that that the version of the xilisf is version 5.2 (this is the one that we added in step 1):

The memory device info needs to be passed to the xilifs library (Overview -> standalone -> xilifs)

  • serial_flash_family = 5 (Spansion/Micron)
  • serial_flash_interface = 1 (AXI SPI)

Build application (Project -> Build all)

Step 4: Create User Application

This is the application that will be copied into memory and executed by the bootloader. 

For this example, the Hello World application is created.

File -> New -> Application Project. 

Name the application. Select Next to continue.

Select the Hello World application template. 

Select Finish to continue.

Link all sections into DDR. 

To do this, right click on the newly created application, and select Generate Linker Script.

Place all sections in DDR:


Step 5: Generate Bitstream with BRAM initialized with bootloader.

In SDK, Program the bitstream (Xilinx Tools -> Program FPGA):

Select the bootloader ELF (created in step 2) under ELF/MEM File to Initialize in block RAM, and select Program to continue:

This will run update_mem, and will output a download.bit file.


Step 6: Program Flash

Next, The SDK Program Flash Utility will be used to program the user application (Hello World) to Flash.

To open this, go to Xilinx Tools -> Program Flash.

Here, the offset is the same as the offset used in the blconfig in step 2.

Select Program to continue:

Next, the SDK Program Flash Utility will be used again, this time to program the bitstream initialized with the bootloader in BRAM.

To open this, go to Xilinx Tools -> Program Flash.
Here, the image file is the download.bit that was generated in step 5.

The offset is 0x0.
Select Program to continue:

Now the flash has been programmed with the user (Hello World) application SREC and the bitstream, including the bootloader.
To Test, open a serial port and reset the board.

This will configure the FPGA and run the Hello World Application.


Associated Attachments

Name File Size File Type
userrepo.zip 399 KB ZIP
AR# 64238
Date Created 04/13/2015
Last Updated 04/30/2015
Status Active
Type General Article
  • Artix-7
  • Vivado Design Suite - 2015.1
  • Vivado Design Suite - 2014.4.1