Does the IP support the Synchronous Switching feature of the SMPTE-SDI standard?
Is it possible to perform source switching on line 6 for example, (i.e. switch one source for something else using a video switch) all running at HD-SDI?
Sync(ronous) switching is only valid when switching between two sources that are the same rate, and typically genlocked so that they are aligned to within a hundred pixels or so.
It is always done on a specific line in the vertical blanking interval so that issues caused by the switch are invisible.
The Xilinx SDI cores fully support this, but you should keep in mind that the remainder of the line after the switch will be corrupted until the next EAV arrives and the RX can sync up again.
This behavior is not unique to Xilinx.
The IP operates similarly to comparable solutions in that all implementations behave the same way, with the line being corrupted until the next EAV comes along.