During simulation of the PING example, I wish to extend my burst size beyond 256 bytes. However, the latency timer is set to its maximum of FF or 256 bytes. Can this be extended for the PING example and other PCI core designs?
There are two ways to have a burst length of more than 256; one is PCI-compliant, and the other is not.
The burst size is limited by the latency timer if the core does not have GNT# asserted to it as an initiator. The latency timer is only 8 bits, so it is limited to a value of FF or 256.
To burst beyond this, GNT# needs to be continuously asserted to the core. When the core as an initiator receives a GNT# from the arbiter, it will start the transaction by asserting FRAME#; at the same time, the LT starts ticking down regardless of whether or not GNT# is still asserted. Therefore, if the GNT# is taken away during the transaction, the burst will either end on the next clock cycle (if the LT already equals zero), or it will continue until the LT equals zero.
In the PING example, the GNT assertion only occurs for one clock cycle. To change this, modify the "dumb_arbiter" file in the source directory to keep GNT# asserted for as long as needed.
You may disable the latency timer so that the core will not time out, even when the latency timer ticks down to zero. To do this, look for bit 112 in the "cfg_ping.v" or "cfg_ping.vhd file" and set it to "Disable". Now, the core as an initiator will burst until the transaction is ended by de-asserting FRAME# or until the target disconnects. However, this is not compliant with the PCI specification, which mandates the use of the latency timer.