There are many different SPI flash PROMs available through multiple vendors. How do I select an SPI PROM?
The Spartan-3E Functional Description data sheet lists available SPI Flash PROMs that are expected to operate with Spartan-3E FPGAs. Other compatible devices might work but have not been tested for suitability with Spartan-3E FPGAs.
For parts not listed in the data sheet, use the following guidelines to check for compatibility:
- PROM Density: At minimum, the PROM must be big enough to hold the Spartan-3E bitstream. Bitstream sizes are available in the Spartan-3E data sheet.
- Supported SPI Flash Commands: The READ command of the SPI flash in question must be supported by one of the Spartan-3E Vendor Select Codes. These codes and associated READ commands are defined in the Spartan-3E data sheet.
- Max Clock Frequency: Check SPI Flash data sheet for maximum clock frequency. The default CCLK frequency is ~1.5 MHz. Set the BitGen ConfigRate option appropriately. Make sure the CCLK variance is taken into account. The Spartan-3E data sheet specifies the min/max tolerance of CCLK. For more information on ConfigRate settings in 7.1i, see (Xilinx Answer 22093).
- Power-Up Unavailable Time: SPI Flash PROM must be ready to receive data when the FPGA completes housecleaning (INIT_B goes High). PROM vendors specify an "Unavailable time", which is defined as the time when the Flash VCC reaches its minimum data sheet voltage to the time when the PROM can be accessed. For more information on power-on precautions, see the SPI portion of the Spartan-3E Functional Description data sheet.
The Spartan-3E FPGA Functional Description data sheet is located at:
The Spartan-3E FPGA DC and Switching Characteristic data sheet is located at: