Since System Generator does not have a DSP48A1 or DSP48E1 block available for direct instantiation, how can I use the pre-adder in the Spartan-6 and Virtex-6 DSP slice from System Generator?
Many DSP IP cores take full advantage of the pre-adder available in Spartan-6 and Virtex-6 architectures. However, if you need to build custom functionality utilizing the pre-adder feature, use the following information.
Because System Generator cannot directly instantiate a DSP48A1 or DSP48E1 DSP slice, the pre-adder in these slices must be accessed in one of the following ways:
1. Build designs using the System Generator Add/Sub and Multiplier blocks specifying that these blocks use behavioral HDL instead of the associated IP cores. When this is done, the DSP slices can be inferred by the synthesizable HDL code during synthesis.
2. Using HDL, explicitly instantiate the DSP slice needed and bring it into System Generator as an HDL black box.
3. Using the MCode block in System Generator to infer the DSP slice behavior which the synthesis tool can then map to a DSP Slice.
There are future plans to expand the DSP48 Macro block to allow accessing the Spartan-6 and Virtex-6 DSP slice pre-adders natively in System Generator.
If you are unable to successfully implement these options to utilize the pre-adder in Spartan-6 and Virtex-6 families, please open a technical support case for further assistance.