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AR# 36986

Virtex-6 FPGA Design Assistant - Designing configurable logic structures in Virtex-6 FPGAs


This Answer Record provides guidance and information on what you should know about FPGA fabric configuration and setup.
NOTE: This Answer Record is part of the Xilinx Virtex-6 FPGA Solution Center (Xilinx Answer 34963). The Xilinx Virtex-6 FPGA Solution Center is available to address all questions related to Virtex-6 devices.Whether you are starting a new design with Virtex-6 FPGA or troubleshooting a problem, use the Virtex-6 FPGA Solution Center to guide you to the right information.


When coding for a Virtex-6 FPGA design, you should follow the coding guidelines shown in the language templates and also follow the recommendations for coding practices discussed in the HDL Coding Practices to Accelerate Design Performance White Paper (WP231):
Follow the recommendations mentioned in this White Paper so that the software tools optimally utilize the FPGA fabric. You can also refer to the following Answer Records for more information on coding methods that can help optimize performance and reduce the amount of logic used in a design:

(Xilinx Answer 37062) - Utilizing distributed memory in fabric
(Xilinx Answer 37065) - Setting logic controls in the fabric
(Xilinx Answer 37066) - Using SRLs to conserve resources
(Xilinx Answer 37067) - Using optimization features from third-party synthesis tools
In addition, the Virtex-6 FPGA Configurable Logic Block User Guide (UG364) describes the primitives and blocksin more detail so that you have a better understanding of how the Virtex-6 FPGA fabric can work for you in a design:

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34963 Xilinx Virtex-6 FPGA Solution Center N/A N/A

Associated Answer Records

AR# 36986
Date 12/15/2012
Status Active
Type General Article
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
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