How do you enable Differential Termination for true differential input IOSTANDARDs?
You can enable internal DIFF_TERM in the following ways:
Enable DIFF_TERM in HDL Code.
The Language Templates and device Libraries Guide contain the instantiation template for the IBUFDS/IBUFGDS which contains an attribute DIFF_TERM that is set to TRUE to enable the DIFF_TERM.
Example VERILOG Instance:
Enable DIFF_TERM in UCF.
The DIFF_TERM constraint syntax is documented in the Constraints Guide.
Enable DIFF_TERM in XDC.
You can see the syntax for this constraint in the Vivado Constraints Guide.
The property can be set in the Vivado or PlanAhead GUI. You should select the input pair from the port list. There is a checkbox under properties that allows this to be set.