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AR# 37326

LogiCORE Divider Generator - Why do I receive a CARRYCASCIN DRC about a DSP48 Slice instance in my simulation of Divider Generator core?

Description

Why do I receive a CARRYCASCIN DRC about a DSP48 Slice instance in my simulation of Divider Generator core?

"DRC warning : CARRYCASCIN can only be used in the current DSP48E instance TESTBENCH.interpo_divider.\BU2/U0/i_synth_opt.i_nonzero_fract.i_synth/
opt_high_radix.i_high_radix/i_quotient_collector/i_typical_case.i_addsub/
i_vx5_sp3.i_casc_dsp48.i_upper_addsub/i_synth_option.i_synth_model/
opt_vx5.i_uniwrap/i_primitive .genblk1 if the previous DSP48E is performing a two input ADD operation, or the current DSP48E is configured in the MAC extend opmode 7'b1001000 at 615.100 ns. This warning can be also triggered if OPMODEREG is set to 1 and CARRYINSELREG is set to 0 - in which case please set CARRYINSELREG to 1."

Solution


This simulation warning can be safely ignored when it is pointing to a DSP Slice located in the Divider Generator IP.
If this is found in user logic, you should review the design against the recommendations in the appropriate DSP Slice User Guide.
For a detailed list of LogiCORE Divider Generator Release Notes and Known Issues, see (Xilinx Answer 29120).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
29120 LogiCORE IP Divider Generator - Release Notes and Known Issues N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
29120 LogiCORE IP Divider Generator - Release Notes and Known Issues N/A N/A
AR# 37326
Date Created 08/09/2010
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • Divider