AR# 42923

ML561 - Are CK and CK# signals relevant for QDRII SRAM?


UG199, Virtex-5 FPGA ML561 Memory Interfaces Development Board User Guide, v1.2.1, Table 5-4 outlines the signals for the QDRII SRAM.

Should Clock (CK, CK#) be included here?


CK and CK# signals are for DDR2 SDRAM, and are not relevant for QDRII SRAM.

They can be ignored in this table.
AR# 42923
Date 12/15/2012
Status Active
Type General Article
Boards & Kits