The Spartan-6 MCB includes a datapath. The datapath handles the flow of write and read data between the memory device and the user logic.
Each port contains a command path and a datapath. For a uni-directional port, a command path is paired with a single read-only or a single write-only datapath. However, for a bi-directional port, a single command path is shared by both the read and write datapaths associated with that port. FIFOs are used at the User Interface of the command path and datapath to queue up memory requests and to manage the transfer from the user clock domain to the memory controller clock domain.
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In the datapath, the underlying hardware contains six 32-bit ports, two of which are inherently bi-directional. The other four ports are inherently uni-directional, but can be combined to create bi-directional ports as well. There are five possible port configurations that combine these six hardware ports to implement the desired User Interface. The width of the read and write data word fields of the User Interface are naturally determined by the chosen configuration.
The datapath FIFOs are 64 deep, allowing for burst lengths of up to 64 data words from a given start address. In addition to the data word field, the write path FIFOs contain mask bit fields that allow optional masking of write data on a per byte basis. Full, empty, underrun, count, and error outputs indicate the current status of the write data FIFOs. The read data FIFOs have a similar set of status outputs.
For more details on the read and write datapath signals,see the Spartan-6 FPGAMemory Controller User Guide(UG388):
Navigate to the "MCB Functional Description" -> "Interface Details" section.