Version Found: v1.2
Version Resolved and other Known Issues: See (Xilinx Answer 45195)
When setting theSIM_BYPASS_INIT_CAL = "OFF" parameter in sim_tb_top, read leveling runs multiple iterations and applies the averaged results. This goes beyond the practical limits for the simulation to complete, therefore, it is recommended that you use it only for hardware implementation.
Setting SIM_BYPASS_INIT_CAL = "OFF" in sim_tb_top and SIM_CAL_OPTION = "FAST" in phy_top, specifies a hardware behavioral simulation except without running multiple iterations of read leveling. Use the "FAST" parameter for behavioral simulations only, not for implementation and hardware.
This will be documented in a future release of the 7 Series FPGAs Memory Interface Solutions User Guide (UG586):
http://www.xilinx.com/support/documentation/ip_documentation/ug586_7Series_MIS.pdf
Revision History
08/15/2012 - Changed "FAST_WIN_TOP" to "FAST" to match UG586
09/09/2011 - Initial release
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 41227 | MIG 7 Series v1.2 - Release Notes and Known Issues for ISE Design Suite 13.2 | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 43099 | MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 | N/A | N/A |
| 43908 | MIG 7 Series v1.2 DDR3 - SIM_BYPASS_INIT_CAL options Not Documented in UG586 | N/A | N/A |
| 41227 | MIG 7 Series v1.2 - Release Notes and Known Issues for ISE Design Suite 13.2 | N/A | N/A |
| AR# 44019 | |
|---|---|
| Date | 08/16/2012 |
| Status | Active |
| Type | Known Issues |
| Devices | |
| IP | |