UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 47046: LogiCORE IP Triple-Rate Serial Digital Interface (SDI) - Why does HD-SDI and 3G-SDI work, while SD-SDI has many receive errors?

AR# 47046

LogiCORE IP Triple-Rate Serial Digital Interface (SDI) - Why does HD-SDI and 3G-SDI work, while SD-SDI has many receive errors?

Description

Why does HD-SDI and 3G-SDI work, while SD-SDI has many receive errors?

Solution

This can happen if the dru_sim.v/vhd file is used for synthesis. This is a simulation file that does not take into account jitter, and will not work correctly in hardware. Users should make sure to use the dru.ngc netlist when implementing their design.

Please see (Xilinx Answer 40473) for a detailed list of LogiCORE IP Triple Rate SDI Release Notes and Known Issues.
Please see (Xilinx Answer 42805) for a detailed list of LogiCORE IP Spartan-6 FPGA Triple-Rate SDI Release Notes and Known Issues.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
42805 LogiCORE IP Spartan-6 FPGA Triple-Rate SDI (Serial Digital Interface) - Release Notes and Known Issues N/A N/A
40473 LogiCORE IP Triple-Rate SDI (Serial Digital Interface) Virtex-6 - Release Notes and Known Issues N/A N/A
AR# 47046
Date 12/17/2012
Status Active
Type General Article
IP
  • Spartan-6 FPGA Triple-Rate SDI

By using this website, I accept the use of cookies.   Learn more

Page Bookmarked