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Xilinx Vivado HLS Solution Center

The Vivado HLS Solution Center is available to address all questions related to the tool. Whether you are learning how to use the tool or troubleshooting a problem, use the Solution Center to guide you to the right information.

Design Assistant

Xilinx Vivado HLS Solution Center - Design Assistant

The Design Assistant walks you through the recommended design flow for Vivado HLS. 

The Design Assistant not only provides useful design and troubleshooting information, but also points you to the exact documentation you need to read to help you design efficiently with Vivado High-Level Synthesis.

NOTE: This answer record is part of the Xilinx Vivado HLS Solution Center (Xilinx Answer 47428). The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS.



Free video trainings are available at the Xilinx Training site:
Vivado High-Level Synthesis Training

Directive Behaviors

(Xilinx Answer 60923) : Design Assistant for Vivado HLS : Understanding the Vivado HLS Design Flow

(Xilinx Answer 60924) : Design Assistant for Vivado HLS : C Code and Vivado HLS

(Xilinx Answer 60925) : Design Assistant for Vivado HLS : Design Analysis and Optimization

(Xilinx Answer 60926) : Design Assistant for Vivado HLS : RTL Verification

(Xilinx Answer 60927) : Design Assistant for Vivado HLS : Integrating HLS IP into the System


Documentation

Xilinx Vivado HLS Solution Center - Documentation

Xilinx Solution Center for Vivado High-Level Synthesis - Documentation

Please refer to the following documentation when using Vivado High-Level Synthesis.

NOTE: This answer record is part of the Xilinx Vivado HLS Solution Center (Xilinx Answer 47428)

The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS.


User Guides

2014.2 Vivado High-Level Synthesis User Guide (UG902)
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_2/ug902-vivado-high-level-synthesis.pdf

2014.2 Vivado Design Suite Tutorial: High-Level Synthesis (UG871):
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_2/ug871-vivado-high-level-synthesis-tutorial.pdf

Please note that the 2014.2 versions of both UG902 and UG871 are the same as the 2014.1 versions, only the first pages have been modified to indicate the applicable versions: 2014.1 and 2014.2.

 

Free video training is available at the Xilinx Training site:
Vivado High-Level Synthesis Training


DocNav Design Hub for Vivado HLS

A Design Hub for Vivado HLS is available inside Xilinx Documentation Navigator (DocNav).

 

Xilinx DocNav provides access to all Xilinx documentation. 

The Design Hub tab contains a section on High-Level Synthesis which contains links to all Vivado High-Level Synthesis documentation, QuickTake training videos and Application Notes.


  


Answer Number Answer Title Version Found Version Resolved
59626 Vivado HLS 2014.1: How do I compile with Microsoft Visual Studio? N/A N/A

Design Advisories

Design Advisory Master Answer Record for Xilinx Vivado HLS Tool

Design Advisory Answer Records are created for issues that are important to designs currently in progress and can be selected to be included in the Xilinx Alert Notification System.

Note: This Answer Record is part of the Xilinx Vivado HLS Solution Center (Xilinx Answer 47428). The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS tool.

There are no design advisories for Vivado HLS.


Top Issues

Xilinx Vivado HLS Solution Center - Top Issues

This answer record covers current known issues related to the Vivado HLS tool.

This answer record is part of the Xilinx Vivado HLS Solution Center; see (Xilinx Answer 47428)

The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS tools.


Top Issues

(Xilinx Answer 43271) AutoESL - RTL Implementation results in "@E [IMPL-4] 'autoimpl' failed: 'xtclsh' cannot be found. Please check your PATH variable."
(Xilinx Answer 51042) Vivado HLS - RTL export result in "@E [IMPL-28] Failed to generate IP." or "@E [IMPL-4] 'xtclsh' cannot be found. Please check your PATH variable."
(Xilinx Answer 50152) Vivado HLS- Java 2 Platform Standard Edition binary has stopped working
(Xilinx Answer 50501) Vivado HLS - Running Verilog or VHDL simulation with ModelSim results in errors

Vivado HLS Known Issues

For Vivado HLS known issues, use the "Search" box on the upper left corner of the Xilinx Support Page.
A filter can be applied to sort out known issues specific to a version. There are also issues that might affect multiple tool versions.