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AR# 51907

Zynq-7000 SoC, Boot IOP - SDIO Boot mode runs at low frequency and 1-bit data width


The SD I/O interface data width and operating frequency in boot mode are programmed by the BootROM and operates at 400 KHz or less with a data width of 1 bit.


Impact: Minor.
Configurations Affected: Systems that use the SDIO boot mode.
Device Revision(s) Affected:Refer to (Xilinx Answer 47916) Zynq-7000 Device Advisory Master Answer Record

The user can change the operating frequency and data with using the FSBL (runs after the BootROM hands off control to the user).

Summary of operating parameters:

 Parameter7z020 CES7z045 CESPlanned for Production
Register Bit Fieldslcr.SDIO_CLK_CTRL[DIVISOR]0x1E0x20
sdio0.Host_control_Power_control_Block_Gap_Control_Wakeup_control [Data_Transfer_Width_SD1_or_SD4]01
sdio0.Clock_Control_Timeout_control_Software_reset [SDCLK_Frequency_Select]0x400x01
SD I/OSD I/O Clock Frequency (PS_CLK = 30 to 60 MHz)~ 400 KHz~ 12 to 24 MHz
SD I/O Data Width1 bit4 bits
AR# 51907
Date 05/25/2018
Status Active
Type Design Advisory
  • Zynq-7000
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