UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 52275

Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.3 (Vivado 2012.3) - Virtex-7 1140T IES device support

Description

Version Found: v1.3
Version Resolved and other Known Issues
: See (Xilinx Answer 47441)

Does Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.3 core support Virtex-7 1140T IES devices?

Solution

The core does support Virtex-7 1140T devices. However, when configuring the core in the GUI, it only allows the selection of GES and not IES.

To work around this issue, generate the core by selecting GES and make the following modification to make the wrapper compatible with IES devices.

  • In *_synth.v file, change PCIE_USE_MODE from '2.1' to '2.0'.

Revision History
11/16/2012 - Initial release

NOTE: "Version Found" refers to the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions

AR# 52275
Date Created 10/26/2012
Last Updated 08/26/2013
Status Active
Type Known Issues
IP
  • Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)