This is a known issue for the core implemented in Artix and Kintex devices due to an Intel errata. To work around this issue, please refer to (Xilinx Answer 51135).
An out-of-the-box solution is available to enable customers to run the Kintex-7 Connectivity TRD. This involves using a particular set of files (bit and MCS file) when running the Connectivity TRD. The files needed, k7_conn_trd.bit and kc705_conn_trd.mcs, can be found below.
For information on how to run the Connectivity TRD, please refer to the Kintex-7 FPGA Connectivity Targeted Reference Design User Guide (UG927):
This solution is no longer required for Connectivity TRD (v1.4); the PCIe IP has been updated, so this patch no longer applies.
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