UPGRADE YOUR BROWSER
We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
The 7 Series Integrated Block for PCI Express core does not link up successfully on an Intel Z77 (Ivy Bridge) platform. This affects the out-of-the-box experience for customers wishing to use the Artix-7 FPGA AC701 Evaluation Kit TRD.
This is a known issue for the core implemented in Artix and Kintex devices due toan Intel errata. To work around this issue, please refer to (Xilinx Answer 51135).
An out-of-the-box solution is available to enable customers to run the Artix-7 FPGA AC701 Evaluation Kit TRD. This involves using a particular set of files (.bit and .mcs file) when running the TRD. The files needed,a7_base_trd.bit and AC701.mcs, can be found below.
For information on how to run the Artix-7 FPGA AC701 TRD, please refer to UG964, AC701 Base Targeted Reference Design User Guide, UG964.
Name | File Size | File Type |
---|---|---|
AC701_Ivy_fix.zip | 5 MB | ZIP |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
51900 | Artix-7 FPGA AC701 Evaluation Kit - Known Issues and Release Notes Master Answer Record | N/A | N/A |
53372 | Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record | N/A | N/A |
AR# 53489 | |
---|---|
Date | 03/02/2013 |
Status | Active |
Type | Known Issues |
Boards & Kits |