The user can also create top level HDL wrapper file using the command below since a XMP source cannot be synthesized directly.
vivado% make_wrapper-files[get_files <path to XMP file>] -top -fileset [get_filesets sources_1] -import
vivado% read_verilog <absolute path to the generated wrapper file>
This creates a top-level HDL file and adds it to the source list. The top-level wrapper file is created in the same location as the XMP file.
For a MicroBlaze based design, the user should populate the I-LMB with either a Bootloop ortheir own executable in ELF format.
An example Bootloop ELF can be found here: $XILINX_EDK/sw/lib/microblaze/mb_bootloop_le.elf.
The user then needs to add the ELF and associate it with the MicroBlaze instance. The following steps would do this.
vivado% add_files <ELF file Targeted to BRAM with .elf extension>
vivado% set_property MEMDATA.ADDR_MAP_CELLS {<XPS system instance name>/microblaze_0} [get_files <BRAM Targeted ELF File>]
If the user design has multiple levels of hierarchy,they need to ensure that the correct hierarchy is provided.
After this, the user needs to go through the usual synthesis, Place and Routesteps to get the design implemented. One aspect that needs to be kept in mind is that for the synthesis (synth_design) step, the user needs to provide the target part as the default target part, whichmay not be the same as the desired one.
In case the user wants specific reports to be generated or check-points to be dumped at certain stages of the design implementation,they need to ensure that the appropriate commands are added to the script.
Once the design is routed user can generate a bitstream by invoking tcl procedure write_bitstream with filename having .bit extension. The bitstream will have the BRAM contents populated with the ELF data.
vivado% write_bitstream <bitfile name>
For users who would like to export the hardware system to SDK, they need to use the following command:
vivado% export_hardware [get_files <Path to XMP file>] -dir <Absolute Export Directory Path>
Script
The followingis a template scriptthat can be used to execute the project-less flow for XPS/XMP source:
add_files <Absolute path to XMP file>
vivado% read_verilog <top-level>.v *
vivado% read_xdc <top-level>.xdc *
add_files <ELF file Targeted to BRAM with .elf extension>
set_property MEMDATA.ADDR_MAP_CELLS {{<XPS system instance name>/microblaze_0} [get_files <BRAM Targeted ELF File>]
synth_design -part <part_name> -top <top-level module name>
opt_design
place_design
route_design
write_bitstream system.bit
export_hardware [get_files <Absolute path to XMP file>] -dir <Absolute Export Directory Path>
* -> if Top Level Stub does not exist, use following commands to generate a top-level wrapper for Embedded Source:
make_wrapper-files[get_files <path to XMP file>] -top -fileset [get_filesets sources_1] -import read_verilog <absolute path to the generated wrapper file>
Users can source this script after updating it to their needs on the Vivado Tcl prompt:
vivado% source <user_script_for project_less_flow>.tcl