I have a Multiple Subsystem Generator design where there are two subsystems which both have their own clock locations defined in their respective System Generator tokens. However, when I look in the ISE project incorporating the generated Multiple Subsystem Generator design, after implementation, the selected pins are not chosen for the respective clocks from each subsystem.
When I reviewed messages in the Matlab console, I found messages related to these LOCs being ignored in the Multiple Subsystem Generator flow.
Warning: The subsystem 'Top_Design/Subsystem' specifies a clock pin location (A9). This location constraint is ignored
in the multiple subsystem generation flow.
How do I get the clocks correctly placed?
As the message highlights, this is expected behavior in the Multiple Subsystem Generator flow. It is necessary to add a UCF file to the overall ISE project to include the necessary LOC constraints.
For example, based on above warning:
NET "subsystem_cw_clk" LOC = A9;