FIFO Generator IP can generate an *_clocks.xdc file that uses the "set_max_delay -datapath_only" constraint, depending on the configuration of the FIFO chosen to constrain CDC (Clock Domain Crossing) paths that are associated with the FIFO logic.
User may add "set_clock_groups" constraint to relax timing on the two clocks associated with the FIFO in the user XDC file.
Because the "set_clock_groups" takes precedence over "set_max_delay", the FIFO "set_max_delay" constraints are not honored.
This does not show up in Vivado as an Error or Critical Warning since this conforms to constraint priority as defined by SDC.
How can I avoid this problem?
To validate design constraints, run DRC with the "methodology_checks" rule deck in Synthesized design.
This problem can be captured with the "methodology_checks" rule deck with the following warning:
It is not recommended to override a "set_max_delay -datapath_only" constraint.
Below are some possible solutions: