Solution
When the I2C controller is used as a master on a multi-master bus, the I2C controller does not detect when another master I2C controller drives SDA Low for a repeated start.
The I2C controller can corrupt a transaction on the bus, when all of the following conditions are met:
The other master starts a transaction at the same time.
The other master addresses the same slave.
The other master selects the same transaction (read or write).
For a write, the other master drives the same data.
For a read, the other master ACKs at the same time.
The other master reads or writes the same amount of data.
At the end of the transaction, the other master issues a repeated start.
Impact:
Major.
Under the described conditions, the I2C controller does not detect the repeated start from the other master I2C controller and can drive SDA Low for a repeated start during the other master I2C controllers transaction, thus corrupting a transaction on the bus.
However, the likelihood of such a condition is extremely rare.
Work-around:
Disable the repeated start by always clearing the HOLD bit to zero.
Configurations Affected:
All Zynq devices using the I2C controller as a master on a multi-master bus.
Device Revision(s) Affected:
All, no plan to fix. Refer to
(Xilinx Answer 47916) - Zynq-7000 AP SoC Silicon Revision Differences
Resolution:
This is a third-party errata; this will not be fixed.