We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 60695

Zynq-7000 SoC, I2C - I2C Missing Arbitration on Repeated Start


I2C Missing Arbitration on Repeated Start


When the I2C controller is used as a master on a multi-master bus, the I2C controller does not detect when another master I2C controller drives SDA Low for a repeated start. 

The I2C controller can corrupt a transaction on the bus, when all of the following conditions are met:

  • The other master starts a transaction at the same time.
  • The other master addresses the same slave.
  • The other master selects the same transaction (read or write).
    For a write, the other master drives the same data.
    For a read, the other master ACKs at the same time.
  • The other master reads or writes the same amount of data.
  • At the end of the transaction, the other master issues a repeated start.



Under the described conditions, the I2C controller does not detect the repeated start from the other master I2C controller and can drive SDA Low for a repeated start during the other master I2C controllers transaction,
 thus corrupting a  transaction on the bus.

However, the likelihood of such a condition is extremely rare.

Disable the repeated start by always clearing the HOLD bit to zero.
Configurations Affected:

All Zynq devices using the I2C controller as a master on a multi-master bus.
Device Revision(s) Affected:

All, no plan to fix. Refer to (Xilinx Answer 47916) - Zynq-7000 SoC Silicon Revision Differences

This is a third-party errata; this will not be fixed.                                                                   

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
47916 Zynq-7000 SoC Devices - Silicon Revision Differences N/A N/A
AR# 60695
Date 05/28/2018
Status Active
Type Design Advisory
  • SoC
Page Bookmarked