Xilinx leverages the encryption methodology as specified in the IEEE standard Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP)
The library compilation process automatically handles encryption.
To use the SECUREIP library in a third party simulator, you must have a mixed-language license or an additional licensing feature for SECUREIP if you are a VHDL user only.
Contact the simulator vendor for more information.
Note: Secure IP Blocks are fully supported in the Vivado simulator without an additional setup.
VHDL SECUREIP Library
The UNISIM library contains the wrappers for VHDL SECUREIP.
Place the following two lines at the beginning of each file so that the simulator can bind to the entity:
Verilog SECUREIP Library
When running a simulation using Verilog code, you must reference the SECUREIP library for most simulators.
If you use the precompiled libraries, use the correct directive to point to the precompiled libraries.
The following is an example for the Vivado simulator:
You can use the Verilog SECUREIP library at compile time by using -f switch.
The file list is available in the file<Vivado_Install_Dir>/data/secureip/secureip_cell.list.f.