When using AXI Ethernet in a Block Diagram (BD) design in "SGMII over LVDS" mode, I need to add an idelay control element manually.
How can I do this?
There is no idelay control element available in the IPI catalog and so you will need to add this as a local pcore.
Below are the steps to do this:
For earlier version of the core, additional steps are required. Please refer to (Xilinx Answer 64142).
This issue has been fixed in v7.0 of the AXI 1G/2.5G Ethernet Subsystem.