The Xilinx PCI Express DMA IP provides high-performance direct memory access (DMA) via PCI Express.
The PCIe DMA supports UltraScale+, UltraScale, Virtex-7 XT and 7 Series Gen2 devices; the provided driver can be used for all of these devices.
This answer record provides drivers and software that can be run on a PCI Express root port host PC to interact with the DMA endpoint IP via PCI Express.
The drivers and software provided with this answer record are designed for Linux operating systems and can be used for lab testing or as a reference for driver and software development.
Through the use of the PCIe DMA IP and the associated drivers and software, you will be able to generate high throughput PCIe memory transactions between a host PC and a Xilinx FPGA.
Please download the "Xilinx PCI Express DMA Drivers and Software Guide" PDF and the associated design files at the end of this answer record.
The file names are:
1. The windows driver source files are available for the driver binary files provided with this answer record.
Please request the source code access in the link below:
2. The provided drivers onlysupport X86-based platforms.
For Queue DMA subsystem for PCI Express (PCIe) Drivers, see (Xilinx Answer 70928)
|05/14/2016||Updated for Vivado 2016.1|
|05/31/2016||Updated for AR67111 and 2016.2|
|01/25/2017||Updated for Vivado 2016.4|
|04/20/2017||Updated for Vivado 2017.1|
|06/08/2017||Added Xilinx_Answer_65444_Linux_2017_1.pdf and Xilinx_Answer_65444_Linux_Driver_2017_1_r45.zip|
|07/28/2017||Updated with unified Linux files|
|09/28/2017||Updated Linux and Windows documents|
|01/22/2018||Updated Windows drivers|
|05/10/2018||Updated note mentioning driver support for X86 based platform only|