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AR# 65444

Xilinx PCI Express DMA Drivers and Software Guide


The Xilinx PCI Express DMA IP provides high-performance direct memory access (DMA) via PCI Express. The PCIe DMA can be implemented in Xilinx 7 Series XT, and UltraScale devices.

This answer record provides drivers and software that can be run on a PCI Express root port host PC to interact with the DMA endpoint IP via PCI Express.

The drivers and software provided with this answer record are designed for Linux operating systems and can be used for lab testing or as a reference for driver and software development. Through the use of the PCIe DMA IP and the associated drivers and software, you will be able to generate high throughput PCIe memory transactions between a host PC and a Xilinx FPGA.

The drivers and software provided in this answer record are applicable to both Vivado 2016.1 and earlier versions, except for the following limitations:

  • Poll Mode: Supported only in Vivado 2016.1. Earlier versions of Vivado only support interrupt mode which is the default behavior of the driver.
  • Source/Destination Address: Earlier versions of Vivado PCIe DMA IP required the low-order bits of the Source and Destination address to be the same. As of 2016.1 this restriction has been removed and the Source and Destination addresses can be any arbitrary address that is valid for your system.


Please download the "Xilinx PCI Express DMA Drivers and Software Guide" PDF and the associated design files at the end of this answer record.

The file names are:

  • Xilinx_Answer_65444_v2016_1.pdf
  • Xilinx_Answer_65444_Files_v2016_1_AR67111_Patch.zip [Note: Install patch provided in (Xilinx Answer 67111)]

Revision History:

10/06/2015 - Initial Release
05/14/2016 - Updated for Vivado 2016.1
05/31/2016 - Updated for AR67111 and 2016.2


Associated Attachments

AR# 65444
Date Created 09/17/2015
Last Updated 06/10/2016
Status Active
Type General Article
  • DMA for PCI Express (PCIe) Subsystem