This answer record contains the Release Notes and Known Issues for the UltraScale Architecture PHY for PCI Express Core and includes the following:
This article is part of the PCI Express Solution Centre
|(Xilinx Answer 34536)||Xilinx Solution Center for PCI Express|
Supported devices can be found in the following three locations:
Changes in v1.0 (Rev4)
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
Known and Resolved Issues
The following table provides known issues for the UltraScale Architecture PHY for PCI Express core, starting with v1.0, initially released in Vivado 2016.1.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Answer Record||Title||Version Found||Version Resolved|
|08/06/2016||Updated for 2016.2 Release|
|10/05/2016||Updated for 2016.3 Release|
|01/24/2017||Updated for 2016.4 Release|
|04/05/2017||Updated for 2017.1 Release|