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AR# 9088

Packaging - Does Xilinx provide "Theta-JB" (Thermal Resistance from junction to board) data for its packages?


"Theta-JB" is a thermal measurement from the junction to the board. I cannot find this data in some of the Xilinx data sheets. Is this information available?


This information does not apply to Virtex-4, Virtex-5 and Spartan-3 Generation FPGAs. Xilinx provides Theta-JB specifications for these devices.
Until the advent of Virtex-II Pro devices, Xilinx had not adopted the "Theta-JB" standard because most of the high-performance products and packages in which heat might be a concern are used in an environment where heat sinks are required (or at least the minimum air flow is required). Although "Theta-JB" might be useful in certain circumstances, these situations were rare.
As defined by JEDEC in the 1999 standard, "Theta-JB" is the thermal resistance from junction to board using an isothermal ring cold plate zone concept that forces the heat from the package to preferentially exit through the board. While this serves as a good figure for comparing packages in a given board (in this case the JEDEC board), it is not generally realistic in most applications (except in certain space environments) to expect a special cold ring zone to force the heat flow through the board exclusively.
"Psi-JB" is a thermal parameter that mimics "Theta-JB." It is similarly defined, except that the isothermal requirement does not apply and heat flow preference is not a requirement. As a result, "Psi-JB" can be measured in the same fixture that is used for measuring "Theta-JA" with airflow. This eliminates the extra bulky isothermal ring cold plate, and makes the characterization process more convenient and similar to real-world applications.
The careful construction of the "Theta-JB" fixture ensures that nearly all heat leaving the package exits through the board and into an isothermal cold plate; however, this is not available for the "Psi-JB" test. In fact, it is likely that a certain amount of heat will leave the package through the top and the sides. Therefore, "Psi-JB" will always be numerically smaller than "Theta-JB" because the temperature differential is divided by the full power, but not all power is the source of the temperature difference.
By request, Xilinx can report "Psi-JB" instead of "Theta-JB" for most of our packages. In our model data, "Theta-JB" and "Psi-JB" are very close (often within 10% -15% of each other). Consequently, supplying "Psi-JB" is usually adequate.
Thermal data for Xilinx device packages can be found using the Package Thermal Data Query tool:
AR# 9088
Date 01/25/2013
Status Active
Type General Article
  • 1700/E/D/L
  • 1700L/D QPro/R
  • 17S00
  • More
  • 17V00
  • 17V00 QPro/R
  • 1800
  • 18V00
  • 18V00 QPro/R
  • 4000/E/XL/XV
  • 4000E/EX/XL QPro/R
  • 9500
  • 9500XL
  • 9500XL IQ
  • 9500XL XA
  • 9500XV
  • CoolRunner XPLA3
  • CoolRunner-II
  • CoolRunner-II XA
  • Platform Flash
  • Platform Flash XA
  • RocketPHY
  • Spartan/XL
  • Spartan-3
  • Spartan-3 XA
  • Spartan-3A
  • Spartan-3A DSP
  • Spartan-3AN
  • Spartan-3E
  • Spartan-6 LX
  • Spartan-6 LXT
  • Spartan-II
  • Spartan-IIE
  • Spartan-IIE XA
  • Spartan-XL IQ
  • System ACE
  • Virtex
  • Virtex QPro/R
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 QPro/R
  • Virtex-4 SX
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-E
  • Virtex-E QPro
  • Virtex-EM
  • Virtex-II
  • Virtex-II Pro
  • Virtex-II Pro X
  • Virtex-II QPro/R
  • Less