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Easics

  • Member Partner
  • Program Member Since: 2021
    • Leuven, BE (Headquarters)

Partner Information

easics is a semiconductor company. easics performs chip design & verification services and electronic product ideation services, and licenses its Semiconductor Intellectual Property (SIP) portfolio. easics targets Field Programmable Gate Arrays (FPGAs) and FPGA Systems-on-Module (SoMs), Systems-on-Chip (SoCs), as well as Application Specific Integrated Circuits (ASICs). easics’s semiconductor IP cores catalog includes: nearbAI for customizable & computationally efficient Deep / Convolutional Neural Networks (DNNs / CNNs) inference for real-time pattern matching close to your sensor(s). nearbAI’s web-based software development tool suite stackbAI, easics’s modular FPGA SoM-based development kit for fast prototyping and connectivity to your sensor(s) TCP/IP + UDP offload engines for reliable high-speed & low-latency connectivity easics is active in healthcare, industry 4.0, imaging, consumer electronics, wired & wireless connectivity, measurement equipment and space markets. easics’s customers are leading product companies worldwide, including Original Equipment Manufacturers (OEMs, whose products contain electronics, software, optics and mechanics), semiconductor companies, and analog & mixed-signal IC design companies. With 30 years of experience and a proven quality system, easics has an impeccable track record designing first-time-right silicon. easics was founded in 1991 as a spin-off company of KU Leuven – ESAT and imec.

Products/Services

  • Design Services
  • IP Cores

Markets Supported

  • Audio Video and Broadcast
  • Aerospace and Defense
  • Industrial
  • Medical
  • Test and Measurement
  • Wired Communications
  • Wireless Communications

Design Competencies

  • Computer Vision
  • Digital Signal Processing
  • Embedded Application Development
  • Embedded Porting - BSP Extension
  • Embedded Processors
  • FPGA Design and Integration
  • FPGA Design Optimization
  • FPGA Timing Closure
  • Machine Learning
  • Quality and Reliability Testing
  • Image Sensor Fusion
  • Signal Integrity Design and Analysis
  • System Architecture

Maximum Service Scope

  • Chip level FPGA - ASIC Design

Engagement Model

  • Time and Materials
  • SOW-Based Fixed Bid Projects
  • Captive Engineering Resources at Partner Location