Important Information
Important: Vitis 2020.3 provides the latest speed file for Versal devices. The function of Vitis 2020.3 is identical to Vitis 2020.2.
Versal AI Core series devices require a separate AI Engine tool license. Please visit Vitis get started webpage
Vitis™ Unified Software Platform 2020.3 is now available:
- Application acceleration and embedded software development support for Versal Platforms
- Introducing the Vitis AI Engine Compiler to compile C/C++ applications for Versal AI Engines
- Vitis HLS is default for both accelerated-kernel compilation (Vitis) and C/C++ to RTL IP creation flow (Vivado)
- 600+ FPGA-accelerated functions across 13 performance-optimized libraries, including the new Vitis HPC library
- Several enhancements & additions to Data Analytics, Vision, Graph, BLAS, Sparse, Security & Database libraries
- Launch and evaluate multiple implementation strategies for final FPGA binary creation
- Git version control, integrated host-kernel profiling and many more improvements for Vitis core tools
- Add-on for MATLAB® and Simulink® : Unification of Xilinx Model Composer and System Generator for DSP, available as an add-on for Vitis
IMPORTANT NOTE: This release supports Versal devices only!
For customers using Versal devices, Xilinx recommends installing Vitis 2020.3. For other devices, please continue to use Vitis 2020.2.
Note:
- Unified Installer installs Vitis Core Development Kit 2020.3. Vitis Libraries, Xilinx Runtime library(XRT), Xilinx FPGA Resource Manager(XRM) and Vitis Target Platforms Available as separate downloads.
- To install Vitis Core Development Kit, select Vitis on the Xilinx Unified Installer. Vitis installation includes Vivado® Design Suite – There is no need to install Vivado separately.