Functional Safety
Highest Levels of Safety and Reliability
Xilinx provides a comprehensive TUV SUD certified design flow solution for our customers to simplify and accelerate certifications based on functional safety specifications across Aerospace & Defense, Automotive, Medical and Industrial markets where safety and reliability are key.
Functional Safety Standards Supported
| Application | Standard |
|---|---|
| Automotive | ISO 26262 |
| Industrial and Medical | IEC 61508, IEC 62061 and IEC 13849 |
| Aerospace & Defense |
DO-254/DO178b |
Xilinx Unique Value Proposition
Xilinx has decades of proven success and experience across a wide variety of mission-critical industries and applications. Our customers choose our portfolio of FPGAs and SoCs for to enable:
- Configurability and increased performance at lower power
- Integration of complex and complete systems into a single device
- Reliability and long product life time
- Faster time to market
Certified Hardware and Software Design Tools
- Design and verification tools certified for use in Functional Safety applications
- Certified Compiler tools
- Functional Safety Certificate and Reports
- Functional Safety Package
Certified Methodologies & IPs
- Certified functional safety design methodologies enable integration of safety and non-safety functions in the same device
- Isolation Design Flow (IDF) and Vivado Isolation Verifier (VIV) / Isolation Verification Tools (IVT) provide a certified methodology to separate areas on a single device. Designs placed into these regions are physically isolated. The areas can be changed at any time without impacting other isolated regions, proven by the VIV/IVT tools (impact analysis)
- Certified Soft Error Mitigation (SEM) IP cores perform Single Event Upset (SEU) detection, correction, and classification for configuration memory. The cores utilize device primitives such as ICAP and FRAME_ECC to clock and observe the Readback CRC feature as part of the SEU detection function. For SEU correction, the IP cores perform the necessary operations to locate and correct errors. For SEU classification, the IP cores use Xilinx Essential Bits technology to further increase system availability.
Assessed Safety Concept Design
The Zynq®-7000 SoC has been reviewed and assessed for on-chip redundancy by TuV Rheinland. This Safety Concept Design study states Xilinx technology can be used to create a single chip solution that will support 2 independent safety channels for SIL3 safety functions referencing IEC61508 Part2 Annex-E.
Functional Safety Lounge
The Functional Safety Lounge provides access to solutions, documentation and additional resources to subscribers.
For paid subscribers only, log in.
Functional Safety Working Group 2019
Munich, Germany
Date: June 26 - 27, 2019
Hilton Munich Airport (Map) >> Reservation
>> Register Now
>> View Agenda
The Xilinx Functional Safety Working Groups (FSWG) are an annual FREE event in North America and Europe that brings together Xilinx Industrial, Automotive and Avionics customers, academic representatives, Xilinx Alliance Members and certification authorities to discuss the latest Functional Safety topics.
New Topics Include:
- Versal functional safety applications
- ZU+ Safety Concept Deep Dive
- ZU+ safety metrics & FMEDA Tool
- PMU Firmware Certification
- STL Reference Design
- Techniques to achieve Freedom-from-Interference in ZU+
- Use of Xilinx devices in ASIL-D applications
Latest Updates on:
- Safety Solution Development Efforts in support of IEC61508, ISO26262 & DO-254/178
- Tools Certification
- Security in Safety Critical Applications
The Xilinx Functional Safety Working Group provides an excellent forum for participants to learn from Xilinx’ functional safety leaders and where attendees can connect with their functional safety peers in the industry. Attendees will develop a better understanding of the industry’s safety requirements for today and tomorrow and learn about innovative and unique solutions coming from Xilinx.
Don’t miss this chance to explore Xilinx’s latest technology innovations and solve your design challenges!
ALL PARTICIPANTS WILL REQUIRE CURRENT NDA AGREEMENTS WITH XILINX.
If you have any questions about the event please contact, safety_solutions@xilinx.com.
Exclusive Offer for FSWG 2019 attendees
- Free 1 year access to all documents on Xilinx Safety Lounge
- Offer Expires July 31, 2019
Individual access. Not valid for other members of the participant's company. No safety-related support. No refund for former purchasers of the Safety Package. To be eligible participant must be accepted and attend one of the Xilinx FSWG events.
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