High Speed Serial
Adaptive Computing Solutions Deliver the Highest Bandwidth, Superior Auto-Adaptive Equalization, and Industry-Leading Productivity Tools
The transceiver offerings cover the gamut of today’s high speed protocols. The GTH and GTY transceivers provide the low jitter required for demanding optical interconnects and feature world class auto-adaptive equalization with PCS features required for difficult backplane operation.
- Versal™ ACAP GTY (32.75Gb/s): Optimized for latency and power reduction
- Versal ACAP GTM (58Gb/s): Tuned for the latest copper cable, backplane, and optical interfaces with PAM4 and NRZ support
- Versal ACAP GTM (112Gb/s): Scaling for 800G Networks on Existing Infrastructure
- UltraScale+™ GTR (6.0Gb/s): Easiest integration of common protocols to the Zynq Processor Subsystem
- UltraScale+ GTH (16.3Gb/s): Low power & high performance for the toughest backplanes
- UltraScale+ GTY (32.75Gb/s): Maximum NRZ performance for the fastest optical and backplane applications; 33G transceivers for chip-to-chip, chip-to-optics, and 28G backplanes
- UltraScale™ GTH (16.3Gb/s): Low power & high performance for the toughest backplanes
- UltraScale GTY (30.5Gb/s): High performance for optical and backplane applications; 30G transceivers for chip-to-chip, chip-to-optics, and 28G backplanes
- UltraScale+ GTM (58Gb/s): Maximum performance using PAM4 for 58G chip-to-chip, chip-to-optics, and backplane applications
- 7 Series GTP (6.6Gb/s): Power optimized transceiver for consumer and legacy serial standards
- 7 Series GTX (12.5Gb/s): Lowest jitter and strongest equalization in a mid-range transceiver
- 7 Series GTH (13.1Gb/s): Backplane and optical performance through world class jitter and equalization
- 7 Series GTZ (28.05Gb/s): Highest rate, lowest jitter 28G transceiver in a 28nm FPGA
- Spartan 6™ GTP (3.2Gb/s): Power and cost optimized transceiver for cost-sensitive applications
The table below shows the range of support within each device family:
| Type | Max Performance1 | Max Transceivers | Peak Bandwidth2 | |
|---|---|---|---|---|
| Versal ACAP | GTY/GTM | 32.75/58.0 | 44/52 | 6,032Gb/s |
| Versal Premium Series | GTY/GTM | 32.75/112.0 | 28/70 | 9,040Gb/s |
| Virtex™ UltraScale+ | GTY/GTM | 32.75/58.0 | 128/483 | 8,384Gb/s |
| Kintex™ UltraScale+ | GTH/GTY | 16.3/32.75 | 44/32 | 3,268Gb/s |
| Virtex UltraScale | GTH/GTY | 16.3/30.5 | 60/60 | 5,616Gb/s |
| Kintex UltraScale | GTH | 16.3 | 64 | 2,086Gb/s |
| Virtex 7 | GTX/GTH/GTZ | 12.5/13.1/28.05 | 56/96/163 | 2,784Gb/s |
| Kintex 7 | GTX | 12.5 | 32 | 800Gb/s |
| Artix™ 7 | GTP | 6.6 | 16 | 211Gb/s |
| Zynq™ UltraScale+ | GTR/GTH/GTY | 6.0/16.3/32.75 | 4/44/28 | 3,268Gb/s |
| Zynq 7000 | GTX | 12.5 | 16 | 400Gb/s |
| Spartan 6 | GTP | 3.2 | 8 | 51Gb/s |
1: Gb/s
2: Combined transmit and receive
3: Max transceiver count found across multiple device families
Backplanes with AMD Transceivers
Leadership in auto-adaptive equalization means XAMD Transceivers provide robust performance across the most challenging backplane and direct attach copper cabled applications. AMD has built a reputation for high quality equalization, from the first 10GBase-KR compliant 7-series GTH to the upcoming 112G PAM4 GTM in Versal™ Premium series, which implements an advanced ADC/DSP based equalizer. Whether it’s a 10G backplane or 100G copper cabling, AMD has a transceiver to support it.
Optical Interconnects with AMD Transceivers
The optical landscape is quickly transitioning beyond 10Gb/s interfaces to 100Gb/s, 400Gb/s and beyond. AMD transceivers are positioned to support the wide range of optical rates and form factors. The Versal ACAPs feature a pair of transceivers to support the variety of optical interconnects in the ecosystem today. GTY/GTYP supports SFP+ and QSFP+ up to 16.3Gb/s and QSFP28 or OSFP up to 32.75Gb/s. The GTM transceiver supports these lower rates as well as QSFP56-DD up to 58Gb/s and future 100Gb/s per-lane interfaces. The equalization’s flexibility and auto-adaptation allows the same transceiver to support both long reach backplanes as well as the short chip-to-optics interconnects with little tuning and huge margins.
UltraScale+ MPSoC High Speed IO
The Zynq™ UltraScale+™ MPSoC comes equipped with the all new GTR Transceiver. By equipping the ARMv8 processors with a transceiver and peripherals to support the most common serial interconnects, AMD has simplified the design process and reduced the overhead associated with interfacing to those interconnects.
| Protocol | Data Rate (Gb/s) | Configuration |
| PCIe 2.0 | 2.5, 5.0 | 1x1, 1x2, 1x4 |
| SATA 3.1 | 1.5, 3.0, 6.0 | 2x1 |
| DisplayPort 1.2a Source | 1.62, 2.7, 5.4 | 1x1, 1x2 |
| USB 3.0 | 5.0 | 2x1 |
| SGMII | 1.25 | 4x1 |
AMD provides a broad range of serial IP protocol support to accelerate design productivity:
| Protocol | UltraScale™ GTH | UltraScale GTY | UltraScale GTM | Versal GTY(GTYP) | Versal GTM |
| PCI Express® | Gen1, 2, 3, 4 | Gen1, 2, 3, 4 | Gen1, 2, 3, 4, (5) | ||
| Fibre Channel | 4, 8, 16G | 4, 8, 16, 10, 20, 32G | 4, 8, 16, 10, 20, 32G | ||
| SATA/SAS | 1.5, 3, 6G | 1.5, 3, 6, 12G | 1.5, 3, 6, 12G (24G SAS) | ||
| Aurora | Up to 16.3G | Up to 32.75G | Up to 58.0G | Up to 32.75G | Up to 112G |
| Protocol | Rate (Gb/s) | UltraScale GTH | UltraScale GTY | UltraScale GTM | Versal GTY(GTYP) | Versal GTM |
| Gigabit Ethernet | 1.25 | QSGMII, 1000BASE-X, SGMII | QSGMII, 1000BASE-X, SGMII | |||
| 10G Ethernet | 3.125 | XAUI | XAUI | XAUI | ||
| 6.25 | RXAUI | RXAUI | RXAUI | |||
| 10.3125 | 10GBase-R/ KR/SR/LR/ER | 10GBase-R/ KR/SR/LR/ER | 10GBase-R/ KR/SR/LR/ER | 10GBase-R/ KR/SR/LR/ER/CR | 10GBase-R/ KR/SR/LR/ER | |
| 40G Ethernet | 10.3125 | 40GBASE-R/ KR4, XLAUI, XLPPI | 40GBASE-R/ KR4, XLAUI, XLPPI | 40GBASE-R/ KR4, XLAUI, XLPPI | 40GBASE-R/ KR4, XLAUI, XLPPI, CR4 | 40GBASE-R/ KR4, XLAUI, XLPPI |
| 100G Ethernet | 10.3125 | 100GBASE-R/ CR10, CAUI-10, CPPI | 100GBASE-R/ CR10, CAUI-10, CPPI | 100GBASE-R/ CR10, CAUI-10, CPPI | 100GBASE-R/ CR10, CAUI-10, CPPI | 100GBASE-R/ CR10, CAUI-10, CPPI |
| 25.78 | 100G-CR4/KR4, CAUI-4 | 100G-CR4/KR4, CAUI4 | 100G-CR4/KR4, CAUI4 | 100G-CR4/KR4, CAUI4 | ||
| 53.125 | CAUI2 | CAUI-2 | ||||
| 400G Ethernet | 400GAUI16 | 400GAUI8 | 400GAUI16 | 400GAUI8 | ||
| OTU | 0.62 - 32.57 | OTU-2/3/4, OC-12,48,192 | OTU-2/3/4, OC-12,48,192 | OTU-2/3/4, OC-12,48,192 | ||
| SONET | 0.62 - 32.57 | OTU-2/3/4, OC-12,48,192 | OTU-2/3/4, OC-12,48,192 | OTU-2/3/4, OC-12,48,192 | ||
| Interlaken | - | Up to 16.3G | Up to 25.78G | Up to 53.125 | Up to 25.78G | Up to 53.125 |
| CEI Electrical | 4.976 - 6.375 | 6G | 6G | 6G | ||
| 9.95 - 11.1 | 11G-SR/MR/LR | 11G-SR/MR/LR | 11G-SR/MR/LR | 11G-SR/MR/LR | 11G-SR/MR/LR | |
| 19.6 - 28.05 | 28G-VSR, 25G-LR | 28G-VSR, 25G-LR | 28G-VSR, 25G-LR | 28G-VSR, 25G-LR | ||
| 58 | 56G-VSR/LR | 56G-VSR/LR | ||||
| PON | BPON, GPON, GEPON, 10GGPON, 10GEPON | BPON, GPON, GEPON, 10GGPON, 10GEPON | BPON, GPON, GEPON, 10GGPON, 10GEPON |
| Protocol | UltraScale GTH | UltraScale GTY | UltraScale GTM | Versal GTY(GTYP) | Versal GTM |
| CPRI | 1.228, 3.072, 6.144, 9.83, 16.3G | 1.228, 3.072, 6.144, 9.83, 16.3G | 1.228, 3.072, 6.144, 9.83, 16.3, 19.7, 20.6G | ||
| Serial Rapid IO | 1.25, 2.5, 3.125, 5, 6.25G | 1.25, 2.5, 3.125, 5, 6.25G | 1.25, 2.5, 3.125, 5, 6.25G | ||
| JESD204A/B | Up to 12.5G | Up to 12.5G | |||
| JESD204C | Up to 30G |
| Protocol | UltraScale GTH | UltraScale GTY | Versal GTY(GTYP) |
| SDI | SDI, HD-SDI, 3G-SDI | SDI, HD-SDI, 3G-SDI | SDI, HD-SDI, 3G-SDI, 12G-SDI, 24G-SDI |
Accelerating Productivity for High Performance Designs
The AMD Versal and UltraScale Architecture transceiver portfolio delivers exceptional value to customers in the following areas:
- Auto-adaptive equalization to build robust systems with backplanes or un-retimed optics
- Chipscope, IBERT and 2D Eye Scan tools for easy hardware validation and link margin analysis
- Flexible clocking architecture to support various use models
- Superior jitter performance for greater link margin
- Vivado™ Design Suite or ISE™ Design Suite for smooth design and implementation
- Development Kits to reduce development time
FPGA Mezzanine Card (FMC) to a wide variety of protocols and interfaces
